Commit Graph

15 Commits

Author SHA1 Message Date
Peter Zijlstra
6e37738a2f perf_events: Simplify code by removing cpu argument to hw_perf_group_sched_in()
Since the cpu argument to hw_perf_group_sched_in() is always
smp_processor_id(), simplify the code a little by removing this argument
and using the current cpu where needed.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: David Miller <davem@davemloft.net>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <1265890918.5396.3.camel@laptop>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-26 10:56:53 +01:00
David S. Miller
e7bef6b04c sparc64: Fully support both performance counters.
Add the rest of the conflict detection and resolution logic necessary
to support more than one counter at a time on sparc64.

The structure and implementation closely mimicks that of powerpc.

Signed-off-by: David S. Miller <davem@davemloft.net>
2010-01-20 16:23:03 -08:00
David S. Miller
4f6dbe4ac0 sparc64: Add perf callchain support.
Pretty straightforward, and it should be easy to add accurate
walk through of signal stack frames in userspace.

Signed-off-by: David S. Miller <davem@davemloft.net>
Tested-by: Jens Axboe <jens.axboe@oracle.com>
2010-01-20 16:23:02 -08:00
David S. Miller
e04ed38d4e sparc64: Fix Niagara2 perf event handling.
For chips like Niagara2 that have true overflow indications
in the %pcr (which we don't actually need and don't use)
the interrupt signal persists until the overflow bits are
cleared by an explicit %pcr write.

Signed-off-by: David S. Miller <davem@davemloft.net>
2010-01-04 23:16:03 -08:00
David S. Miller
de23cf3c42 sparc64: Fix niagara2 perf IRQ bits.
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-09 00:42:40 -07:00
David S. Miller
d17513889a sparc64: Cache per-cpu %pcr register value in perf code.
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-29 21:27:06 -07:00
David S. Miller
6e804251d1 sparc64: Fix comment typo in perf_event.c
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-29 15:10:23 -07:00
David S. Miller
d29862f035 sparc64: Minor coding style fixups in perf code.
These got introduced during the counter --> event tree-wide
renaming.

Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-28 17:37:12 -07:00
David S. Miller
a72a8a5f2e sparc64: Add a basic conflict engine in preparation for multi-counter support.
The hardware counter ->event_base state records and encoding of
the "struct perf_event_map" entry used for the event.

We use this to make sure that when we have more than 1 event,
both can be scheduled into the hardware at the same time.

As usual, structure of code is largely cribbed from powerpc.

Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-28 17:35:20 -07:00
David S. Miller
01552f765c sparc64: Add initial perf event conflict resolution and checks.
Cribbed from powerpc code, as usual. :-)

Currently it is only used to validate that all counters
have the same user/kernel/hv attributes.

Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-27 20:43:07 -07:00
David S. Miller
7eebda60d5 sparc: Niagara1 perf event support.
This chip is extremely limited, and many of the events supported
are approximations at best.

Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-26 21:23:41 -07:00
David S. Miller
d0b86480f5 sparc: Add Niagara2 HW cache event support.
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-26 21:04:16 -07:00
David S. Miller
28e8f9bead sparc: Support all ultra3 and ultra4 derivatives.
For the generic events we support, all of these chips have
the same encodings as ultra3i.

Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-26 20:54:22 -07:00
David S. Miller
2ce4da2efc sparc: Support HW cache events.
First supported chip for HW cache events is Ultra-IIIi.

Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-26 20:42:10 -07:00
Ingo Molnar
cdd6c482c9 perf: Do the big rename: Performance Counters -> Performance Events
Bye-bye Performance Counters, welcome Performance Events!

In the past few months the perfcounters subsystem has grown out its
initial role of counting hardware events, and has become (and is
becoming) a much broader generic event enumeration, reporting, logging,
monitoring, analysis facility.

Naming its core object 'perf_counter' and naming the subsystem
'perfcounters' has become more and more of a misnomer. With pending
code like hw-breakpoints support the 'counter' name is less and
less appropriate.

All in one, we've decided to rename the subsystem to 'performance
events' and to propagate this rename through all fields, variables
and API names. (in an ABI compatible fashion)

The word 'event' is also a bit shorter than 'counter' - which makes
it slightly more convenient to write/handle as well.

Thanks goes to Stephane Eranian who first observed this misnomer and
suggested a rename.

User-space tooling and ABI compatibility is not affected - this patch
should be function-invariant. (Also, defconfigs were not touched to
keep the size down.)

This patch has been generated via the following script:

  FILES=$(find * -type f | grep -vE 'oprofile|[^K]config')

  sed -i \
    -e 's/PERF_EVENT_/PERF_RECORD_/g' \
    -e 's/PERF_COUNTER/PERF_EVENT/g' \
    -e 's/perf_counter/perf_event/g' \
    -e 's/nb_counters/nb_events/g' \
    -e 's/swcounter/swevent/g' \
    -e 's/tpcounter_event/tp_event/g' \
    $FILES

  for N in $(find . -name perf_counter.[ch]); do
    M=$(echo $N | sed 's/perf_counter/perf_event/g')
    mv $N $M
  done

  FILES=$(find . -name perf_event.*)

  sed -i \
    -e 's/COUNTER_MASK/REG_MASK/g' \
    -e 's/COUNTER/EVENT/g' \
    -e 's/\<event\>/event_id/g' \
    -e 's/counter/event/g' \
    -e 's/Counter/Event/g' \
    $FILES

... to keep it as correct as possible. This script can also be
used by anyone who has pending perfcounters patches - it converts
a Linux kernel tree over to the new naming. We tried to time this
change to the point in time where the amount of pending patches
is the smallest: the end of the merge window.

Namespace clashes were fixed up in a preparatory patch - and some
stylistic fallout will be fixed up in a subsequent patch.

( NOTE: 'counters' are still the proper terminology when we deal
  with hardware registers - and these sed scripts are a bit
  over-eager in renaming them. I've undone some of that, but
  in case there's something left where 'counter' would be
  better than 'event' we can undo that on an individual basis
  instead of touching an otherwise nicely automated patch. )

Suggested-by: Stephane Eranian <eranian@google.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Paul Mackerras <paulus@samba.org>
Reviewed-by: Arjan van de Ven <arjan@linux.intel.com>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: <linux-arch@vger.kernel.org>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-21 14:28:04 +02:00