Commit Graph

13 Commits

Author SHA1 Message Date
Linus Torvalds
cdd3a354a0 arm-soc: power management changes
Power management changes here are mostly for the omap platform, but also
 include cpuidle changes for ux500 and suspend/resume code for mmp.
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Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc power management changes from Olof Johansson:
 "Power management changes here are mostly for the omap platform, but
  also include cpuidle changes for ux500 and suspend/resume code for
  mmp."

* tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
  ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after hwmod reset
  ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod database
  ARM: OMAP4: hwmod_data: Name the common irq for McBSP ports
  ARM: OMAP4: hwmod data: I2C: add flag for context restore
  ARM: OMAP3: hwmod_data: Rename the common irq for McBSP ports
  ARM: OMAP2xxx: hwmod data: add HDQ/1-wire hwmod
  ARM: OMAP3: hwmod data: add HDQ/1-wire hwmod
  ARM: OMAP2+: hwmod data: add HDQ/1-wire hwmod shared data
  ARM: OMAP2+: HDQ1W: add custom reset function
  ARM: OMAP2420: hwmod data: Add MMC hwmod data for 2420
  arm: omap3: clockdomain data: Remove superfluous commas from gfx_sgx_3xxx_wkdeps[]
  ARM: OMAP2+: powerdomain: Get rid off duplicate pwrdm_clkdm_state_switch() API
  ARM: OMAP3: clock data: add clockdomain for HDQ functional clock
  ARM: OMAP3+: dpll: Configure autoidle mode only if it's supported
  ARM: OMAP2+: dmtimer: cleanup iclk usage
  ARM: OMAP4+: Add prm and cm base init function.
  ARM: OMAP2/3: Add idle_st bits for ST_32KSYNC timer to prcm-common header
  ARM: OMAP3: Fix CM register bit masks
  ARM: OMAP: clock: convert AM3517/3505 detection/flags to AM35xx
  ARM: OMAP3: clock data: treat all AM35x devices the same
  ...
2012-05-22 09:41:01 -07:00
Chao Xie
3f5d081957 ARM: mm: proc-mohawk: add suspend resume for mohawk
When enable ARCH_SUSPEND_POSSIBLE, it need defintion of
cpu_mohawk_do_suspend and cpu_mohawk_do_resume

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <<haojian.zhuang@gmail.com>
2012-05-07 11:42:54 +08:00
Will Deacon
c5102f5935 ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails
The cacheflush syscall can fail for two reasons:

(1) The arguments are invalid (nonsensical address range or no VMA)

(2) The region generates a translation fault on a VIPT or PIPT cache

This patch allows do_cache_op to return an error code to userspace in
the case of the above. The various coherent_user_range implementations
are modified to return 0 in the case of VIVT caches or -EFAULT in the
case of an abort on v6/v7 cores.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-05-02 11:12:49 +01:00
Will Deacon
1a4baafa7d ARM: proc-*.S: place cpu_reset functions into .idmap.text section
The CPU reset functions disable the MMU and therefore must be executed
with an identity mapping in place.

This patch places the CPU reset functions into the .idmap.text section,
causing the idmap code to include them as part of the identity mapping.

Acked-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-12-06 14:04:14 +00:00
Dave Martin
a39a32187b ARM: mm: proc-mohawk: Use the new processor struct macros
This patch also defines a suitable flush_icache_all implementation
which would otherwise be missing, resulting in a link failure.
Thanks to Nicolas Pitre for suggesting the code for this.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-07 15:31:10 +01:00
Russell King
f6b0fa02e8 ARM: pm: add generic CPU suspend/resume support
This adds core support for saving and restoring CPU coprocessor
registers for suspend/resume support.  This contains support for suspend
with ARM920, ARM926, SA11x0, PXA25x, PXA27x, PXA3xx, V6 and V7 CPUs.
Tested on Assabet and Tegra 2.

Tested-by: Colin Cross <ccross@android.com>
Tested-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-22 17:11:23 +00:00
Russell King
5085f3ff45 ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type
When hotplug CPU is enabled, we need to keep the list of supported CPUs,
their setup functions, and __lookup_processor_type in place so that we
can find and initialize secondary CPUs.  Move these into the __CPUINIT
section.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-08 10:07:32 +01:00
Russell King
9ca03a21e3 ARM: Factor out common code from cpu_proc_fin()
All implementations of cpu_proc_fin() start by disabling interrupts
and then flush caches.  Rather than have every processors proc_fin()
implementation do this, move it out into generic code - and move the
cache flush past setup_mm_for_reboot() (so it can benefit from having
caches still enabled.)

This allows cpu_proc_fin() to become independent of the L1/L2 cache
types, and eventually move the L2 cache flushing into the L2 support
code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-27 10:48:42 +01:00
Russell King
702b94bff3 ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range
These are now unused, and so can be removed.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-02-15 15:22:23 +00:00
Russell King
a9c9147eb9 ARM: dma-mapping: provide per-cpu type map/unmap functions
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-02-15 15:22:20 +00:00
Russell King
2c9b9c8490 ARM: add size argument to __cpuc_flush_dcache_page
... and rename the function since it no longer operates on just
pages.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-14 14:53:22 +00:00
Kirill A. Shutemov
4fb2847437 ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()
Instruction fault status register, IFSR, was introduced on ARMv6 to
provide status information about the last insturction fault. It
needed for proper prefetch abort handling.

Now we have three prefetch abort model:

  * legacy - for CPUs before ARMv6. They doesn't provide neither
    IFSR nor IFAR. We simulate IFSR with section translation fault
    status for them to generalize code;
  * ARMv6 - provides IFSR, but not IFAR;
  * ARMv7 - provides both IFSR and IFAR.

Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-10-02 22:34:32 +01:00
Eric Miao
49cbe78637 [ARM] pxa: add base support for Marvell's PXA168 processor line
"""The Marvell® PXA168 processor is the first in a family of application
processors targeted at mass market opportunities in computing and consumer
devices. It balances high computing and multimedia performance with low
power consumption to support extended battery life, and includes a wealth
of integrated peripherals to reduce overall BOM cost .... """

See http://www.marvell.com/featured/pxa168.jsp for more information.

  1. Marvell Mohawk core is a hybrid of xscale3 and its own ARM core,
     there are many enhancements like instructions for flushing the
     whole D-cache, and so on

  2. Clock reuses Russell's common clkdev, and added the basic support
     for UART1/2.

  3. Devices are a bit different from the 'mach-pxa' way, the platform
     devices are now dynamically allocated only when necessary (i.e.
     when pxa_register_device() is called). Description for each device
     are stored in an array of 'struct pxa_device_desc'. Now that:

     a. this array of device description is marked with __initdata and
        can be freed up system is fully up

     b. which means board code has to add all needed devices early in
        his initializing function

     c. platform specific data can now be marked as __initdata since
        they are allocated and copied by platform_device_add_data()

  4. only the basic UART1/2/3 are added, more devices will come later.

Signed-off-by: Jason Chagas <chagas@marvell.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-03-23 10:11:34 +08:00