caab277b1d
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 503 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Enrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
152 lines
5.2 KiB
C
152 lines
5.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Kernel page table mapping
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*
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* Copyright (C) 2015 ARM Ltd.
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*/
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#ifndef __ASM_KERNEL_PGTABLE_H
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#define __ASM_KERNEL_PGTABLE_H
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#include <asm/pgtable.h>
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#include <asm/sparsemem.h>
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/*
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* The linear mapping and the start of memory are both 2M aligned (per
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* the arm64 booting.txt requirements). Hence we can use section mapping
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* with 4K (section size = 2M) but not with 16K (section size = 32M) or
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* 64K (section size = 512M).
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*/
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#ifdef CONFIG_ARM64_4K_PAGES
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#define ARM64_SWAPPER_USES_SECTION_MAPS 1
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#else
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#define ARM64_SWAPPER_USES_SECTION_MAPS 0
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#endif
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/*
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* The idmap and swapper page tables need some space reserved in the kernel
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* image. Both require pgd, pud (4 levels only) and pmd tables to (section)
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* map the kernel. With the 64K page configuration, swapper and idmap need to
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* map to pte level. The swapper also maps the FDT (see __create_page_tables
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* for more information). Note that the number of ID map translation levels
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* could be increased on the fly if system RAM is out of reach for the default
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* VA range, so pages required to map highest possible PA are reserved in all
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* cases.
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*/
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#if ARM64_SWAPPER_USES_SECTION_MAPS
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#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1)
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#define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT) - 1)
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#else
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#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS)
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#define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT))
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#endif
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/*
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* If KASLR is enabled, then an offset K is added to the kernel address
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* space. The bottom 21 bits of this offset are zero to guarantee 2MB
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* alignment for PA and VA.
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*
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* For each pagetable level of the swapper, we know that the shift will
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* be larger than 21 (for the 4KB granule case we use section maps thus
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* the smallest shift is actually 30) thus there is the possibility that
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* KASLR can increase the number of pagetable entries by 1, so we make
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* room for this extra entry.
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*
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* Note KASLR cannot increase the number of required entries for a level
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* by more than one because it increments both the virtual start and end
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* addresses equally (the extra entry comes from the case where the end
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* address is just pushed over a boundary and the start address isn't).
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*/
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#ifdef CONFIG_RANDOMIZE_BASE
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#define EARLY_KASLR (1)
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#else
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#define EARLY_KASLR (0)
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#endif
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#define EARLY_ENTRIES(vstart, vend, shift) (((vend) >> (shift)) \
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- ((vstart) >> (shift)) + 1 + EARLY_KASLR)
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#define EARLY_PGDS(vstart, vend) (EARLY_ENTRIES(vstart, vend, PGDIR_SHIFT))
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#if SWAPPER_PGTABLE_LEVELS > 3
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#define EARLY_PUDS(vstart, vend) (EARLY_ENTRIES(vstart, vend, PUD_SHIFT))
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#else
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#define EARLY_PUDS(vstart, vend) (0)
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#endif
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#if SWAPPER_PGTABLE_LEVELS > 2
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#define EARLY_PMDS(vstart, vend) (EARLY_ENTRIES(vstart, vend, SWAPPER_TABLE_SHIFT))
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#else
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#define EARLY_PMDS(vstart, vend) (0)
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#endif
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#define EARLY_PAGES(vstart, vend) ( 1 /* PGDIR page */ \
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+ EARLY_PGDS((vstart), (vend)) /* each PGDIR needs a next level page table */ \
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+ EARLY_PUDS((vstart), (vend)) /* each PUD needs a next level page table */ \
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+ EARLY_PMDS((vstart), (vend))) /* each PMD needs a next level page table */
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#define INIT_DIR_SIZE (PAGE_SIZE * EARLY_PAGES(KIMAGE_VADDR + TEXT_OFFSET, _end))
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#define IDMAP_DIR_SIZE (IDMAP_PGTABLE_LEVELS * PAGE_SIZE)
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#ifdef CONFIG_ARM64_SW_TTBR0_PAN
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#define RESERVED_TTBR0_SIZE (PAGE_SIZE)
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#else
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#define RESERVED_TTBR0_SIZE (0)
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#endif
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/* Initial memory map size */
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#if ARM64_SWAPPER_USES_SECTION_MAPS
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#define SWAPPER_BLOCK_SHIFT SECTION_SHIFT
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#define SWAPPER_BLOCK_SIZE SECTION_SIZE
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#define SWAPPER_TABLE_SHIFT PUD_SHIFT
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#else
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#define SWAPPER_BLOCK_SHIFT PAGE_SHIFT
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#define SWAPPER_BLOCK_SIZE PAGE_SIZE
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#define SWAPPER_TABLE_SHIFT PMD_SHIFT
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#endif
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/* The size of the initial kernel direct mapping */
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#define SWAPPER_INIT_MAP_SIZE (_AC(1, UL) << SWAPPER_TABLE_SHIFT)
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/*
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* Initial memory map attributes.
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*/
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#define SWAPPER_PTE_FLAGS (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
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#define SWAPPER_PMD_FLAGS (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
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#if ARM64_SWAPPER_USES_SECTION_MAPS
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#define SWAPPER_MM_MMUFLAGS (PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS)
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#else
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#define SWAPPER_MM_MMUFLAGS (PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS)
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#endif
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/*
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* To make optimal use of block mappings when laying out the linear
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* mapping, round down the base of physical memory to a size that can
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* be mapped efficiently, i.e., either PUD_SIZE (4k granule) or PMD_SIZE
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* (64k granule), or a multiple that can be mapped using contiguous bits
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* in the page tables: 32 * PMD_SIZE (16k granule)
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*/
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#if defined(CONFIG_ARM64_4K_PAGES)
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#define ARM64_MEMSTART_SHIFT PUD_SHIFT
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#elif defined(CONFIG_ARM64_16K_PAGES)
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#define ARM64_MEMSTART_SHIFT (PMD_SHIFT + 5)
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#else
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#define ARM64_MEMSTART_SHIFT PMD_SHIFT
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#endif
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/*
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* sparsemem vmemmap imposes an additional requirement on the alignment of
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* memstart_addr, due to the fact that the base of the vmemmap region
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* has a direct correspondence, and needs to appear sufficiently aligned
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* in the virtual address space.
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*/
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#if defined(CONFIG_SPARSEMEM_VMEMMAP) && ARM64_MEMSTART_SHIFT < SECTION_SIZE_BITS
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#define ARM64_MEMSTART_ALIGN (1UL << SECTION_SIZE_BITS)
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#else
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#define ARM64_MEMSTART_ALIGN (1UL << ARM64_MEMSTART_SHIFT)
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#endif
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#endif /* __ASM_KERNEL_PGTABLE_H */
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