3126c7bc41
Add a dummy clk definition for the APB pclk signal on all platforms using the AMBA bus infrastructure. This ensures that these platforms continue to work when the core amba bus code controls the APB pclk. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
76 lines
1.4 KiB
C
76 lines
1.4 KiB
C
/*
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* linux/arch/arm/mach-nomadik/clock.c
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*
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* Copyright (C) 2009 Alessandro Rubini
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/clk.h>
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#include <asm/clkdev.h>
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#include "clock.h"
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/*
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* The nomadik board uses generic clocks, but the serial pl011 file
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* calls clk_enable(), clk_disable(), clk_get_rate(), so we provide them
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*/
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unsigned long clk_get_rate(struct clk *clk)
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{
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return clk->rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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/* enable and disable do nothing */
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int clk_enable(struct clk *clk)
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{
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_disable);
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static struct clk clk_24 = {
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.rate = 2400000,
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};
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static struct clk clk_48 = {
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.rate = 48 * 1000 * 1000,
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};
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/*
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* Catch-all default clock to satisfy drivers using the clk API. We don't
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* model the actual hardware clocks yet.
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*/
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static struct clk clk_default;
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#define CLK(_clk, dev) \
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{ \
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.clk = _clk, \
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.dev_id = dev, \
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}
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static struct clk_lookup lookups[] = {
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{
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.con_id = "apb_pclk",
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.clk = &clk_default,
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},
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CLK(&clk_24, "mtu0"),
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CLK(&clk_24, "mtu1"),
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CLK(&clk_48, "uart0"),
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CLK(&clk_48, "uart1"),
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CLK(&clk_default, "gpio.0"),
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CLK(&clk_default, "gpio.1"),
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CLK(&clk_default, "gpio.2"),
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CLK(&clk_default, "gpio.3"),
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CLK(&clk_default, "rng"),
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};
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int __init clk_init(void)
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{
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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return 0;
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}
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