1d7e356594
Change the DMA event line macros to have the name of the SoC. Also, have the event line number encoded in the macro since on DB5500 several event lines are present at multiple alternate numbers. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
295 lines
6.9 KiB
C
295 lines
6.9 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/amba/bus.h>
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#include <plat/ste_dma40.h>
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#include <mach/hardware.h>
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#include <mach/setup.h>
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#include "ste-dma40-db8500.h"
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static struct nmk_gpio_platform_data u8500_gpio_data[] = {
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GPIO_DATA("GPIO-0-31", 0),
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GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
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GPIO_DATA("GPIO-64-95", 64),
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GPIO_DATA("GPIO-96-127", 96), /* 98..127 not routed to pin */
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GPIO_DATA("GPIO-128-159", 128),
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GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
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GPIO_DATA("GPIO-192-223", 192),
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GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
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GPIO_DATA("GPIO-256-288", 256), /* 268..288 not routed to pin */
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};
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static struct resource u8500_gpio_resources[] = {
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GPIO_RESOURCE(0),
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GPIO_RESOURCE(1),
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GPIO_RESOURCE(2),
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GPIO_RESOURCE(3),
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GPIO_RESOURCE(4),
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GPIO_RESOURCE(5),
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GPIO_RESOURCE(6),
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GPIO_RESOURCE(7),
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GPIO_RESOURCE(8),
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};
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struct platform_device u8500_gpio_devs[] = {
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GPIO_DEVICE(0),
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GPIO_DEVICE(1),
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GPIO_DEVICE(2),
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GPIO_DEVICE(3),
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GPIO_DEVICE(4),
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GPIO_DEVICE(5),
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GPIO_DEVICE(6),
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GPIO_DEVICE(7),
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GPIO_DEVICE(8),
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};
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struct amba_device u8500_ssp0_device = {
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.dev = {
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.coherent_dma_mask = ~0,
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.init_name = "ssp0",
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},
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.res = {
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.start = U8500_SSP0_BASE,
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.end = U8500_SSP0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_DB8500_SSP0, NO_IRQ },
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/* ST-Ericsson modified id */
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.periphid = SSP_PER_ID,
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};
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static struct resource u8500_i2c0_resources[] = {
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[0] = {
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.start = U8500_I2C0_BASE,
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.end = U8500_I2C0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_DB8500_I2C0,
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.end = IRQ_DB8500_I2C0,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device u8500_i2c0_device = {
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.name = "nmk-i2c",
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.id = 0,
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.resource = u8500_i2c0_resources,
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.num_resources = ARRAY_SIZE(u8500_i2c0_resources),
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};
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static struct resource u8500_i2c4_resources[] = {
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[0] = {
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.start = U8500_I2C4_BASE,
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.end = U8500_I2C4_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_DB8500_I2C4,
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.end = IRQ_DB8500_I2C4,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device u8500_i2c4_device = {
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.name = "nmk-i2c",
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.id = 4,
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.resource = u8500_i2c4_resources,
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.num_resources = ARRAY_SIZE(u8500_i2c4_resources),
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};
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/*
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* SD/MMC
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*/
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struct amba_device u8500_sdi0_device = {
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.dev = {
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.init_name = "sdi0",
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},
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.res = {
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.start = U8500_SDI0_BASE,
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.end = U8500_SDI0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_DB8500_SDMMC0, NO_IRQ},
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};
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struct amba_device u8500_sdi1_device = {
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.dev = {
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.init_name = "sdi1",
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},
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.res = {
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.start = U8500_SDI1_BASE,
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.end = U8500_SDI1_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_DB8500_SDMMC1, NO_IRQ},
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};
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struct amba_device u8500_sdi2_device = {
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.dev = {
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.init_name = "sdi2",
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},
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.res = {
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.start = U8500_SDI2_BASE,
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.end = U8500_SDI2_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_DB8500_SDMMC2, NO_IRQ},
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};
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struct amba_device u8500_sdi3_device = {
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.dev = {
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.init_name = "sdi3",
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},
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.res = {
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.start = U8500_SDI3_BASE,
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.end = U8500_SDI3_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_DB8500_SDMMC3, NO_IRQ},
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};
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struct amba_device u8500_sdi4_device = {
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.dev = {
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.init_name = "sdi4",
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},
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.res = {
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.start = U8500_SDI4_BASE,
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.end = U8500_SDI4_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_DB8500_SDMMC4, NO_IRQ},
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};
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struct amba_device u8500_sdi5_device = {
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.dev = {
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.init_name = "sdi5",
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},
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.res = {
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.start = U8500_SDI5_BASE,
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.end = U8500_SDI5_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_DB8500_SDMMC5, NO_IRQ},
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};
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static struct resource dma40_resources[] = {
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[0] = {
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.start = U8500_DMA_BASE,
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.end = U8500_DMA_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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.name = "base",
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},
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[1] = {
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.start = U8500_DMA_LCPA_BASE,
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.end = U8500_DMA_LCPA_BASE + 2 * SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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.name = "lcpa",
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},
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[2] = {
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.start = IRQ_DB8500_DMA,
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.end = IRQ_DB8500_DMA,
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.flags = IORESOURCE_IRQ,
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}
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};
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/* Default configuration for physcial memcpy */
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struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
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.channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE |
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STEDMA40_LOW_PRIORITY_CHANNEL |
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STEDMA40_PCHAN_BASIC_MODE),
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.dir = STEDMA40_MEM_TO_MEM,
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.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
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.src_info.data_width = STEDMA40_BYTE_WIDTH,
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.src_info.psize = STEDMA40_PSIZE_PHY_1,
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.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
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.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
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.dst_info.data_width = STEDMA40_BYTE_WIDTH,
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.dst_info.psize = STEDMA40_PSIZE_PHY_1,
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.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
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};
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/* Default configuration for logical memcpy */
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struct stedma40_chan_cfg dma40_memcpy_conf_log = {
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.channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE |
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STEDMA40_LOW_PRIORITY_CHANNEL |
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STEDMA40_LCHAN_SRC_LOG_DST_LOG |
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STEDMA40_NO_TIM_FOR_LINK),
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.dir = STEDMA40_MEM_TO_MEM,
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.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
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.src_info.data_width = STEDMA40_BYTE_WIDTH,
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.src_info.psize = STEDMA40_PSIZE_LOG_1,
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.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
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.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
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.dst_info.data_width = STEDMA40_BYTE_WIDTH,
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.dst_info.psize = STEDMA40_PSIZE_LOG_1,
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.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
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};
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/*
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* Mapping between destination event lines and physical device address.
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* The event line is tied to a device and therefor the address is constant.
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*/
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static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV];
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/* Mapping between source event lines and physical device address */
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static const dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV];
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/* Reserved event lines for memcpy only */
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static int dma40_memcpy_event[] = {
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DB8500_DMA_MEMCPY_TX_0,
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DB8500_DMA_MEMCPY_TX_1,
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DB8500_DMA_MEMCPY_TX_2,
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DB8500_DMA_MEMCPY_TX_3,
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DB8500_DMA_MEMCPY_TX_4,
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DB8500_DMA_MEMCPY_TX_5,
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};
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static struct stedma40_platform_data dma40_plat_data = {
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.dev_len = DB8500_DMA_NR_DEV,
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.dev_rx = dma40_rx_map,
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.dev_tx = dma40_tx_map,
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.memcpy = dma40_memcpy_event,
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.memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
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.memcpy_conf_phy = &dma40_memcpy_conf_phy,
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.memcpy_conf_log = &dma40_memcpy_conf_log,
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.llis_per_log = 8,
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.disabled_channels = {-1},
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};
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struct platform_device u8500_dma40_device = {
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.dev = {
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.platform_data = &dma40_plat_data,
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},
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.name = "dma40",
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.id = 0,
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.num_resources = ARRAY_SIZE(dma40_resources),
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.resource = dma40_resources
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};
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void dma40_u8500ed_fixup(void)
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{
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dma40_plat_data.memcpy = NULL;
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dma40_plat_data.memcpy_len = 0;
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dma40_resources[0].start = U8500_DMA_BASE_ED;
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dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
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dma40_resources[1].start = U8500_DMA_LCPA_BASE_ED;
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dma40_resources[1].end = U8500_DMA_LCPA_BASE_ED + 2 * SZ_1K - 1;
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}
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