373e68b547
This updates the various boards for some of the recent I/O routine updates. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
150 lines
3.8 KiB
C
150 lines
3.8 KiB
C
/*
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* I/O routines for Titan
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*/
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#include <linux/pci.h>
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#include <asm/machvec.h>
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#include <asm/addrspace.h>
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#include <asm/titan.h>
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#include <asm/io.h>
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#include "../../drivers/pci/pci-sh7751.h"
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#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
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#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
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#define PCI_IO_AREA SH7751_PCI_IO_BASE
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#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
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#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
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#if defined(CONFIG_PCI)
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#define CHECK_SH7751_PCIIO(port) \
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((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
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#define CHECK_SH7751_PCIMEMIO(port) \
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((port >= PCIBIOS_MIN_MEM) && (port < (PCIBIOS_MIN_MEM + SH7751_PCI_MEM_SIZE)))
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#else
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#define CHECK_SH7751_PCIIO(port) (0)
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#endif
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static inline void delay(void)
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{
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ctrl_inw(0xa0000000);
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}
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static inline unsigned int port2adr(unsigned int port)
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{
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maybebadio((unsigned long)port);
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return port;
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}
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u8 titan_inb(unsigned long port)
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{
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if (PXSEG(port))
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return ctrl_inb(port);
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else if (CHECK_SH7751_PCIIO(port))
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return ctrl_inb(PCI_IOMAP(port));
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return ctrl_inw(port2adr(port)) & 0xff;
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}
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u8 titan_inb_p(unsigned long port)
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{
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u8 v;
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if (PXSEG(port))
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v = ctrl_inb(port);
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else if (CHECK_SH7751_PCIIO(port))
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v = ctrl_inb(PCI_IOMAP(port));
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else
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v = ctrl_inw(port2adr(port)) & 0xff;
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delay();
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return v;
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}
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u16 titan_inw(unsigned long port)
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{
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if (PXSEG(port))
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return ctrl_inw(port);
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else if (CHECK_SH7751_PCIIO(port))
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return ctrl_inw(PCI_IOMAP(port));
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else if (port >= 0x2000)
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return ctrl_inw(port2adr(port));
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else
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maybebadio(port);
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return 0;
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}
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u32 titan_inl(unsigned long port)
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{
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if (PXSEG(port))
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return ctrl_inl(port);
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else if (CHECK_SH7751_PCIIO(port))
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return ctrl_inl(PCI_IOMAP(port));
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else if (port >= 0x2000)
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return ctrl_inw(port2adr(port));
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else
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maybebadio(port);
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return 0;
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}
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void titan_outb(u8 value, unsigned long port)
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{
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if (PXSEG(port))
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ctrl_outb(value, port);
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else if (CHECK_SH7751_PCIIO(port))
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ctrl_outb(value, PCI_IOMAP(port));
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else
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ctrl_outw(value, port2adr(port));
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}
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void titan_outb_p(u8 value, unsigned long port)
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{
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if (PXSEG(port))
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ctrl_outb(value, port);
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else if (CHECK_SH7751_PCIIO(port))
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ctrl_outb(value, PCI_IOMAP(port));
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else
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ctrl_outw(value, port2adr(port));
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delay();
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}
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void titan_outw(u16 value, unsigned long port)
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{
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if (PXSEG(port))
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ctrl_outw(value, port);
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else if (CHECK_SH7751_PCIIO(port))
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ctrl_outw(value, PCI_IOMAP(port));
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else if (port >= 0x2000)
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ctrl_outw(value, port2adr(port));
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else
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maybebadio(port);
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}
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void titan_outl(u32 value, unsigned long port)
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{
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if (PXSEG(port))
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ctrl_outl(value, port);
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else if (CHECK_SH7751_PCIIO(port))
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ctrl_outl(value, PCI_IOMAP(port));
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else
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maybebadio(port);
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}
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void titan_insl(unsigned long port, void *dst, unsigned long count)
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{
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maybebadio(port);
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}
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void titan_outsl(unsigned long port, const void *src, unsigned long count)
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{
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maybebadio(port);
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}
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void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
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{
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if (PXSEG(port) || CHECK_SH7751_PCIMEMIO(port))
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return (void __iomem *)port;
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else if (CHECK_SH7751_PCIIO(port))
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return (void __iomem *)PCI_IOMAP(port);
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return (void __iomem *)port2adr(port);
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}
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