d162251d1b
This patch adds the i2c board configuration needed for the Mixed Signal chip AB3550. It also adds the irq numbers needed for the irq_chip implementation. Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
122 lines
3.4 KiB
C
122 lines
3.4 KiB
C
/*
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*
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* arch/arm/mach-u300/include/mach/irqs.h
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*
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*
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* Copyright (C) 2006-2009 ST-Ericsson AB
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* License terms: GNU General Public License (GPL) version 2
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* IRQ channel definitions for the U300 platforms.
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* Author: Linus Walleij <linus.walleij@stericsson.com>
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*/
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#ifndef __MACH_IRQS_H
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#define __MACH_IRQS_H
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#define IRQ_U300_INTCON0_START 0
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#define IRQ_U300_INTCON1_START 32
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/* These are on INTCON0 - 30 lines */
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#define IRQ_U300_IRQ0_EXT 0
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#define IRQ_U300_IRQ1_EXT 1
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#define IRQ_U300_DMA 2
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#define IRQ_U300_VIDEO_ENC_0 3
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#define IRQ_U300_VIDEO_ENC_1 4
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#define IRQ_U300_AAIF_RX 5
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#define IRQ_U300_AAIF_TX 6
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#define IRQ_U300_AAIF_VGPIO 7
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#define IRQ_U300_AAIF_WAKEUP 8
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#define IRQ_U300_PCM_I2S0_FRAME 9
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#define IRQ_U300_PCM_I2S0_FIFO 10
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#define IRQ_U300_PCM_I2S1_FRAME 11
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#define IRQ_U300_PCM_I2S1_FIFO 12
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#define IRQ_U300_XGAM_GAMCON 13
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#define IRQ_U300_XGAM_CDI 14
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#define IRQ_U300_XGAM_CDICON 15
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#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
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/* MMIACC not used on the DB3210 or DB3350 chips */
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#define IRQ_U300_XGAM_MMIACC 16
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#endif
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#define IRQ_U300_XGAM_PDI 17
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#define IRQ_U300_XGAM_PDICON 18
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#define IRQ_U300_XGAM_GAMEACC 19
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#define IRQ_U300_XGAM_MCIDCT 20
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#define IRQ_U300_APEX 21
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#define IRQ_U300_UART0 22
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#define IRQ_U300_SPI 23
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#define IRQ_U300_TIMER_APP_OS 24
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#define IRQ_U300_TIMER_APP_DD 25
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#define IRQ_U300_TIMER_APP_GP1 26
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#define IRQ_U300_TIMER_APP_GP2 27
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#define IRQ_U300_TIMER_OS 28
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#define IRQ_U300_TIMER_MS 29
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#define IRQ_U300_KEYPAD_KEYBF 30
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#define IRQ_U300_KEYPAD_KEYBR 31
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/* These are on INTCON1 - 32 lines */
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#define IRQ_U300_GPIO_PORT0 32
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#define IRQ_U300_GPIO_PORT1 33
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#define IRQ_U300_GPIO_PORT2 34
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#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \
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defined(CONFIG_MACH_U300_BS335)
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/* These are for DB3150, DB3200 and DB3350 */
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#define IRQ_U300_WDOG 35
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#define IRQ_U300_EVHIST 36
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#define IRQ_U300_MSPRO 37
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#define IRQ_U300_MMCSD_MCIINTR0 38
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#define IRQ_U300_MMCSD_MCIINTR1 39
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#define IRQ_U300_I2C0 40
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#define IRQ_U300_I2C1 41
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#define IRQ_U300_RTC 42
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#define IRQ_U300_NFIF 43
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#define IRQ_U300_NFIF2 44
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#endif
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/* DB3150 and DB3200 have only 45 IRQs */
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#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
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#define U300_NR_IRQS 45
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#endif
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/* The DB3350-specific interrupt lines */
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#ifdef CONFIG_MACH_U300_BS335
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#define IRQ_U300_ISP_F0 45
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#define IRQ_U300_ISP_F1 46
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#define IRQ_U300_ISP_F2 47
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#define IRQ_U300_ISP_F3 48
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#define IRQ_U300_ISP_F4 49
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#define IRQ_U300_GPIO_PORT3 50
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#define IRQ_U300_SYSCON_PLL_LOCK 51
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#define IRQ_U300_UART1 52
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#define IRQ_U300_GPIO_PORT4 53
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#define IRQ_U300_GPIO_PORT5 54
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#define IRQ_U300_GPIO_PORT6 55
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#define U300_NR_IRQS 56
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#endif
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/* The DB3210-specific interrupt lines */
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#ifdef CONFIG_MACH_U300_BS365
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#define IRQ_U300_GPIO_PORT3 35
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#define IRQ_U300_GPIO_PORT4 36
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#define IRQ_U300_WDOG 37
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#define IRQ_U300_EVHIST 38
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#define IRQ_U300_MSPRO 39
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#define IRQ_U300_MMCSD_MCIINTR0 40
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#define IRQ_U300_MMCSD_MCIINTR1 41
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#define IRQ_U300_I2C0 42
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#define IRQ_U300_I2C1 43
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#define IRQ_U300_RTC 44
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#define IRQ_U300_NFIF 45
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#define IRQ_U300_NFIF2 46
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#define IRQ_U300_SYSCON_PLL_LOCK 47
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#define U300_NR_IRQS 48
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#endif
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#ifdef CONFIG_AB3550_CORE
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#define IRQ_AB3550_BASE (U300_NR_IRQS)
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#define IRQ_AB3550_END (IRQ_AB3550_BASE + 37)
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#define NR_IRQS (IRQ_AB3550_END + 1)
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#else
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#define NR_IRQS U300_NR_IRQS
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#endif
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#endif
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