Mike Frysinger 502c8a0e07 Blackfin: BF51x: fix handling of PH8 (the "internal" SPI0SEL4 pin) ... Even though the PH8 pin is only internal to the processor packaging, it can be controlled like any other GPIO pin. Now that we have a proper GPIO define, we can fix the SPI0 CS4 define for the internal SPI flash. Signed-off-by: Mike Frysinger <vapier@gentoo.org>		2010-08-06 12:55:49 -04:00
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boot	Blackfin: initial XIP support	2010-03-09 00:30:48 -05:00
configs	Blackfin: tcm-bf518: new board port	2010-03-09 00:30:49 -05:00
include/asm	Blackfin: fix typo in hweight asm	2010-08-06 12:55:49 -04:00
kernel	Blackfin: gpio: unify & clean up reserved map handling	2010-08-06 12:55:47 -04:00
lib	Blackfin: optimize strncpy a bit	2010-05-22 14:19:11 -04:00
mach-bf518	Blackfin: BF51x: fix handling of PH8 (the "internal" SPI0SEL4 pin)	2010-08-06 12:55:49 -04:00
mach-bf527	Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CS	2010-08-06 12:55:49 -04:00
mach-bf533	Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CS	2010-08-06 12:55:49 -04:00
mach-bf537	Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CS	2010-08-06 12:55:49 -04:00
mach-bf538	Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CS	2010-08-06 12:55:49 -04:00
mach-bf548	Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CS	2010-08-06 12:55:49 -04:00
mach-bf561	Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CS	2010-08-06 12:55:49 -04:00
mach-common	Blackfin: allow cache funcs to be in L1 for IFLUSH Anomaly 05000491	2010-08-06 12:55:47 -04:00
mm	Blackfin: use atomic kmalloc in L1 alloc so it too can be atomic	2010-05-22 14:19:12 -04:00
oprofile	Blackfin arch: remove hardware PM code, oprofile not use it	2009-01-07 23:14:39 +08:00
ADI_BSD.txt	Blackfin: mass clean up of copyright/licensing info	2009-10-07 04:36:26 -04:00
Kconfig	Blackfin: allow cache funcs to be in L1 for IFLUSH Anomaly 05000491	2010-08-06 12:55:47 -04:00
Kconfig.debug	Blackfin: allow NMI watchdog to be used w/RETN as a scratch reg	2010-05-22 14:19:04 -04:00
Makefile	Merge commit 'v2.6.35' into kbuild/kbuild	2010-08-04 13:59:13 +02:00