4bb2d1009f
This branch contains a handful of updates of SoC base code that had dependencies on other external trees that have now been merged: * Support for the new EXYNOS5250 SoC from Samsung * SMP and power domain support for Tegra3 from NVIDIA * ux500 updates for exporting SoC information through sysfs -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJPcpwnAAoJEIwa5zzehBx3RIQP/AvTVHF7EIXfu5XGLBYeKW+U HBeT1kO1qL8m3gA/+DG/JzNpd8JDlILGob6hUN4lqA8f49MBkmttdbATZvBj4Nx+ T4+louPteiueexJdolj6hVCuNBhFJLgik3zMKGHvL8wbvqYHKpfqvuWWuzxtP3Hl F1BvFSrQ5TZALGtNiRWDMwxFa2oA03ZNXjy+v9i3GIdn1vH18/IDryz7/7MW6GPv NuKmZkcEpX2jDFe3AkqUMLxqMYizfuGg20FlV4tmxiF5Wlht6EiN38Y56LZgwuly mde6AWN8qgwTYDk4cJ5ZVJtwkowosF5ko57V3SPmVaVc/WajZ0v28gt9YgNLVPL7 TXFEUJgIxzJnyM+DoSltzQ9tCsWUscQGmyPt4QSOLO2D76/3z+8+24/EwAIM/7Bj u5/+74k5jDBZe1suCt/1P1Vr3l5Z3os483R7y4BtyLtWtQvBcjpkITj9lHmnsAf3 RqN2Z4osLcILwWVKa2y2DCOeJm0jvSCsn53+O3FGTSqhfwWTUVkqaDALeGXwJGbH 2rMks18BqJ2sT2ruFXHiVvZOj/8XxkcLsq8ztnuYoHQssrNtAtBM97l/xi1V7L0z FmXnPszVA1mIkelsY2VDImEks/Iaad4o3Iuba9Yr3OKOSr/d8kLyB0reTmS/SHQL u/o8ch/V5QVEo/H+ud7K =X89H -----END PGP SIGNATURE----- Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull "ARM: More SoC support updates" from Olof Johansson: "This branch contains a handful of updates of SoC base code that had dependencies on other external trees that have now been merged: * Support for the new EXYNOS5250 SoC from Samsung * SMP and power domain support for Tegra3 from NVIDIA * ux500 updates for exporting SoC information through sysfs" Fix up trivial merge conflicts as per Olof. * tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (30 commits) ARM: mach-shmobile: ap4evb: Reserve DMA memory for the frame buffer ARM: EXYNOS: Fix compilation error with mach-exynos4-dt board ARM: dts: add initial dts file for EXYNOS5250, SMDK5250 ARM: EXYNOS: add support device tree enabled board file for EXYNOS5 ARM: EXYNOS: add support ARCH_EXYNOS5 for EXYNOS5 SoCs ARM: EXYNOS: add support get_core_count() for EXYNOS5250 ARM: EXYNOS: support EINT for EXYNOS4 and EXYNOS5 ARM: EXYNOS: add interrupt definitions for EXYNOS5250 ARM: EXYNOS: add support for EXYNOS5250 SoC ARM: EXYNOS: add support uart for EXYNOS4 and EXYNOS5 ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5 ARM: EXYNOS: add clock part for EXYNOS5250 SoC ARM: EXYNOS: use exynos_init_uarts() instead of exynos4_init_uarts() ARM: EXYNOS: to declare static for mach-exynos/common.c ARM: EXYNOS: Add clkdev lookup entry for lcd clock ARM: dt: Explicitly configure all serial ports on Tegra Cardhu ARM: tegra: support for secondary cores on Tegra30 ARM: tegra: support for Tegra30 CPU powerdomains ARM: tegra: add support for Tegra30 powerdomains ARM: tegra: export tegra_powergate_is_powered() ...
86 lines
2.6 KiB
C
86 lines
2.6 KiB
C
/*
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* arch/arm/mach-tegra/board-dt-tegra30.c
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*
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* NVIDIA Tegra30 device tree board support
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*
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* Copyright (C) 2011 NVIDIA Corporation
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*
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* Derived from:
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*
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* arch/arm/mach-tegra/board-dt-tegra20.c
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*
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* Copyright (C) 2010 Secret Lab Technologies, Ltd.
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* Copyright (C) 2010 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_fdt.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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#include <asm/hardware/gic.h>
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#include "board.h"
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#include "clock.h"
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static struct of_device_id tegra_dt_match_table[] __initdata = {
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{ .compatible = "simple-bus", },
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{}
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};
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struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000200, "sdhci-tegra.1", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000400, "sdhci-tegra.2", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000600, "sdhci-tegra.3", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C000, "tegra-i2c.0", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C400, "tegra-i2c.1", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C500, "tegra-i2c.2", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL),
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{}
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};
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static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
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/* name parent rate enabled */
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{ "uarta", "pll_p", 408000000, true },
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{ NULL, NULL, 0, 0},
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};
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static void __init tegra30_dt_init(void)
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{
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tegra_clk_init_from_table(tegra_dt_clk_init_table);
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of_platform_populate(NULL, tegra_dt_match_table,
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tegra30_auxdata_lookup, NULL);
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}
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static const char *tegra30_dt_board_compat[] = {
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"nvidia,tegra30",
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NULL
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};
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DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
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.map_io = tegra_map_common_io,
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.init_early = tegra30_init_early,
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.init_irq = tegra_dt_init_irq,
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.handle_irq = gic_handle_irq,
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.timer = &tegra_timer,
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.init_machine = tegra30_dt_init,
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.restart = tegra_assert_system_reset,
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.dt_compat = tegra30_dt_board_compat,
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MACHINE_END
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