67b0ad574b
Bitmap functions for the minix filesystem and the ext2 filesystem except ext2_set_bit_atomic() and ext2_clear_bit_atomic() do not require the atomic guarantees. But these are defined by using atomic bit operations on several architectures. (cris, frv, h8300, ia64, m32r, m68k, m68knommu, mips, s390, sh, sh64, sparc, sparc64, v850, and xtensa) This patch switches to non atomic bit operation. Signed-off-by: Akinobu Mita <mita@miraclelinux.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
539 lines
13 KiB
C
539 lines
13 KiB
C
/* $Id: bitops.h,v 1.67 2001/11/19 18:36:34 davem Exp $
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* bitops.h: Bit string operations on the Sparc.
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*
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* Copyright 1995 David S. Miller (davem@caip.rutgers.edu)
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* Copyright 1996 Eddie C. Dost (ecd@skynet.be)
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* Copyright 2001 Anton Blanchard (anton@samba.org)
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*/
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#ifndef _SPARC_BITOPS_H
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#define _SPARC_BITOPS_H
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#include <linux/compiler.h>
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#include <asm/byteorder.h>
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#ifdef __KERNEL__
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/*
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* Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0'
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* is in the highest of the four bytes and bit '31' is the high bit
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* within the first byte. Sparc is BIG-Endian. Unless noted otherwise
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* all bit-ops return 0 if bit was previously clear and != 0 otherwise.
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*/
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static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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register unsigned long mask asm("g2");
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register unsigned long *ADDR asm("g1");
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register int tmp1 asm("g3");
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register int tmp2 asm("g4");
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register int tmp3 asm("g5");
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register int tmp4 asm("g7");
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ADDR = ((unsigned long *) addr) + (nr >> 5);
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mask = 1 << (nr & 31);
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__asm__ __volatile__(
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"mov %%o7, %%g4\n\t"
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"call ___set_bit\n\t"
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" add %%o7, 8, %%o7\n"
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: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
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: "0" (mask), "r" (ADDR)
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: "memory", "cc");
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return mask != 0;
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}
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static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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register unsigned long mask asm("g2");
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register unsigned long *ADDR asm("g1");
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register int tmp1 asm("g3");
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register int tmp2 asm("g4");
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register int tmp3 asm("g5");
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register int tmp4 asm("g7");
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ADDR = ((unsigned long *) addr) + (nr >> 5);
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mask = 1 << (nr & 31);
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__asm__ __volatile__(
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"mov %%o7, %%g4\n\t"
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"call ___set_bit\n\t"
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" add %%o7, 8, %%o7\n"
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: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
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: "0" (mask), "r" (ADDR)
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: "memory", "cc");
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}
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static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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register unsigned long mask asm("g2");
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register unsigned long *ADDR asm("g1");
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register int tmp1 asm("g3");
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register int tmp2 asm("g4");
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register int tmp3 asm("g5");
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register int tmp4 asm("g7");
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ADDR = ((unsigned long *) addr) + (nr >> 5);
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mask = 1 << (nr & 31);
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__asm__ __volatile__(
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"mov %%o7, %%g4\n\t"
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"call ___clear_bit\n\t"
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" add %%o7, 8, %%o7\n"
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: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
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: "0" (mask), "r" (ADDR)
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: "memory", "cc");
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return mask != 0;
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}
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static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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register unsigned long mask asm("g2");
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register unsigned long *ADDR asm("g1");
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register int tmp1 asm("g3");
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register int tmp2 asm("g4");
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register int tmp3 asm("g5");
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register int tmp4 asm("g7");
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ADDR = ((unsigned long *) addr) + (nr >> 5);
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mask = 1 << (nr & 31);
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__asm__ __volatile__(
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"mov %%o7, %%g4\n\t"
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"call ___clear_bit\n\t"
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" add %%o7, 8, %%o7\n"
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: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
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: "0" (mask), "r" (ADDR)
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: "memory", "cc");
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}
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static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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register unsigned long mask asm("g2");
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register unsigned long *ADDR asm("g1");
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register int tmp1 asm("g3");
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register int tmp2 asm("g4");
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register int tmp3 asm("g5");
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register int tmp4 asm("g7");
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ADDR = ((unsigned long *) addr) + (nr >> 5);
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mask = 1 << (nr & 31);
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__asm__ __volatile__(
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"mov %%o7, %%g4\n\t"
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"call ___change_bit\n\t"
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" add %%o7, 8, %%o7\n"
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: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
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: "0" (mask), "r" (ADDR)
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: "memory", "cc");
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return mask != 0;
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}
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static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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register unsigned long mask asm("g2");
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register unsigned long *ADDR asm("g1");
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register int tmp1 asm("g3");
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register int tmp2 asm("g4");
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register int tmp3 asm("g5");
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register int tmp4 asm("g7");
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ADDR = ((unsigned long *) addr) + (nr >> 5);
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mask = 1 << (nr & 31);
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__asm__ __volatile__(
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"mov %%o7, %%g4\n\t"
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"call ___change_bit\n\t"
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" add %%o7, 8, %%o7\n"
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: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
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: "0" (mask), "r" (ADDR)
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: "memory", "cc");
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}
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/*
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* non-atomic versions
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*/
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static inline void __set_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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*p |= mask;
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}
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static inline void __clear_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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*p &= ~mask;
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}
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static inline void __change_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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*p ^= mask;
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}
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static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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unsigned long old = *p;
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*p = old | mask;
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return (old & mask) != 0;
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}
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static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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unsigned long old = *p;
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*p = old & ~mask;
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return (old & mask) != 0;
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}
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static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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unsigned long old = *p;
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*p = old ^ mask;
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return (old & mask) != 0;
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}
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#define smp_mb__before_clear_bit() do { } while(0)
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#define smp_mb__after_clear_bit() do { } while(0)
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/* The following routine need not be atomic. */
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static inline int test_bit(int nr, __const__ volatile unsigned long *addr)
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{
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return (1UL & (((unsigned long *)addr)[nr >> 5] >> (nr & 31))) != 0UL;
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}
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/* The easy/cheese version for now. */
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static inline unsigned long ffz(unsigned long word)
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{
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unsigned long result = 0;
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while(word & 1) {
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result++;
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word >>= 1;
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}
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return result;
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}
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/**
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* __ffs - find first bit in word.
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* @word: The word to search
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*
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* Undefined if no bit exists, so code should check against 0 first.
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*/
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static inline int __ffs(unsigned long word)
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{
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int num = 0;
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if ((word & 0xffff) == 0) {
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num += 16;
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word >>= 16;
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}
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if ((word & 0xff) == 0) {
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num += 8;
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word >>= 8;
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}
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if ((word & 0xf) == 0) {
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num += 4;
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word >>= 4;
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}
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if ((word & 0x3) == 0) {
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num += 2;
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word >>= 2;
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}
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if ((word & 0x1) == 0)
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num += 1;
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return num;
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}
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/*
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* Every architecture must define this function. It's the fastest
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* way of searching a 140-bit bitmap where the first 100 bits are
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* unlikely to be set. It's guaranteed that at least one of the 140
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* bits is cleared.
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*/
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static inline int sched_find_first_bit(unsigned long *b)
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{
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if (unlikely(b[0]))
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return __ffs(b[0]);
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if (unlikely(b[1]))
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return __ffs(b[1]) + 32;
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if (unlikely(b[2]))
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return __ffs(b[2]) + 64;
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if (b[3])
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return __ffs(b[3]) + 96;
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return __ffs(b[4]) + 128;
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}
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/*
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* ffs: find first bit set. This is defined the same way as
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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static inline int ffs(int x)
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{
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if (!x)
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return 0;
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return __ffs((unsigned long)x) + 1;
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}
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/*
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* fls: find last (most-significant) bit set.
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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#define fls(x) generic_fls(x)
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#define fls64(x) generic_fls64(x)
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/*
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* hweightN: returns the hamming weight (i.e. the number
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* of bits set) of a N-bit word
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*/
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#define hweight32(x) generic_hweight32(x)
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#define hweight16(x) generic_hweight16(x)
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#define hweight8(x) generic_hweight8(x)
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/*
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* find_next_zero_bit() finds the first zero bit in a bit string of length
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* 'size' bits, starting the search at bit 'offset'. This is largely based
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* on Linus's ALPHA routines, which are pretty portable BTW.
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*/
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static inline unsigned long find_next_zero_bit(const unsigned long *addr,
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unsigned long size, unsigned long offset)
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{
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const unsigned long *p = addr + (offset >> 5);
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unsigned long result = offset & ~31UL;
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unsigned long tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= 31UL;
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if (offset) {
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tmp = *(p++);
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tmp |= ~0UL >> (32-offset);
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if (size < 32)
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goto found_first;
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if (~tmp)
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goto found_middle;
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size -= 32;
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result += 32;
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}
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while (size & ~31UL) {
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if (~(tmp = *(p++)))
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goto found_middle;
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result += 32;
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size -= 32;
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}
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if (!size)
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return result;
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tmp = *p;
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found_first:
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tmp |= ~0UL << size;
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if (tmp == ~0UL) /* Are any bits zero? */
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return result + size; /* Nope. */
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found_middle:
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return result + ffz(tmp);
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}
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/*
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* Linus sez that gcc can optimize the following correctly, we'll see if this
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* holds on the Sparc as it does for the ALPHA.
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*/
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#define find_first_zero_bit(addr, size) \
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find_next_zero_bit((addr), (size), 0)
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/**
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* find_next_bit - find the first set bit in a memory region
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* @addr: The address to base the search on
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* @offset: The bitnumber to start searching at
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* @size: The maximum size to search
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*
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* Scheduler induced bitop, do not use.
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*/
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static inline int find_next_bit(const unsigned long *addr, int size, int offset)
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{
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const unsigned long *p = addr + (offset >> 5);
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int num = offset & ~0x1f;
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unsigned long word;
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word = *p++;
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word &= ~((1 << (offset & 0x1f)) - 1);
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while (num < size) {
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if (word != 0) {
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return __ffs(word) + num;
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}
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word = *p++;
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num += 0x20;
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}
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return num;
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}
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/**
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* find_first_bit - find the first set bit in a memory region
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* @addr: The address to start the search at
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* @size: The maximum size to search
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*
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* Returns the bit-number of the first set bit, not the number of the byte
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* containing a bit.
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*/
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#define find_first_bit(addr, size) \
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find_next_bit((addr), (size), 0)
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/*
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*/
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static inline int test_le_bit(int nr, __const__ unsigned long * addr)
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{
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__const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
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return (ADDR[nr >> 3] >> (nr & 7)) & 1;
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}
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/*
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* non-atomic versions
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*/
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static inline void __set_le_bit(int nr, unsigned long *addr)
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{
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unsigned char *ADDR = (unsigned char *)addr;
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ADDR += nr >> 3;
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*ADDR |= 1 << (nr & 0x07);
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}
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static inline void __clear_le_bit(int nr, unsigned long *addr)
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{
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unsigned char *ADDR = (unsigned char *)addr;
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ADDR += nr >> 3;
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*ADDR &= ~(1 << (nr & 0x07));
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}
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static inline int __test_and_set_le_bit(int nr, unsigned long *addr)
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{
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int mask, retval;
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unsigned char *ADDR = (unsigned char *)addr;
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ADDR += nr >> 3;
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mask = 1 << (nr & 0x07);
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retval = (mask & *ADDR) != 0;
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*ADDR |= mask;
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return retval;
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}
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static inline int __test_and_clear_le_bit(int nr, unsigned long *addr)
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{
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int mask, retval;
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unsigned char *ADDR = (unsigned char *)addr;
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ADDR += nr >> 3;
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mask = 1 << (nr & 0x07);
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retval = (mask & *ADDR) != 0;
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*ADDR &= ~mask;
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return retval;
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}
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static inline unsigned long find_next_zero_le_bit(const unsigned long *addr,
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unsigned long size, unsigned long offset)
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{
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const unsigned long *p = addr + (offset >> 5);
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unsigned long result = offset & ~31UL;
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unsigned long tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= 31UL;
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if(offset) {
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tmp = *(p++);
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tmp |= __swab32(~0UL >> (32-offset));
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if(size < 32)
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goto found_first;
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if(~tmp)
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goto found_middle;
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size -= 32;
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result += 32;
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}
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while(size & ~31UL) {
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if(~(tmp = *(p++)))
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goto found_middle;
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result += 32;
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size -= 32;
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}
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if(!size)
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return result;
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tmp = *p;
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found_first:
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tmp = __swab32(tmp) | (~0UL << size);
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if (tmp == ~0UL) /* Are any bits zero? */
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return result + size; /* Nope. */
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return result + ffz(tmp);
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found_middle:
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return result + ffz(__swab32(tmp));
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}
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#define find_first_zero_le_bit(addr, size) \
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find_next_zero_le_bit((addr), (size), 0)
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#define ext2_set_bit(nr,addr) \
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__test_and_set_le_bit((nr),(unsigned long *)(addr))
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#define ext2_clear_bit(nr,addr) \
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__test_and_clear_le_bit((nr),(unsigned long *)(addr))
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#define ext2_set_bit_atomic(lock, nr, addr) \
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({ \
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int ret; \
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spin_lock(lock); \
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ret = ext2_set_bit((nr), (unsigned long *)(addr)); \
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spin_unlock(lock); \
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ret; \
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})
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#define ext2_clear_bit_atomic(lock, nr, addr) \
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({ \
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int ret; \
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spin_lock(lock); \
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ret = ext2_clear_bit((nr), (unsigned long *)(addr)); \
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spin_unlock(lock); \
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ret; \
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})
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#define ext2_test_bit(nr,addr) \
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test_le_bit((nr),(unsigned long *)(addr))
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#define ext2_find_first_zero_bit(addr, size) \
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find_first_zero_le_bit((unsigned long *)(addr), (size))
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#define ext2_find_next_zero_bit(addr, size, off) \
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find_next_zero_le_bit((unsigned long *)(addr), (size), (off))
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/* Bitmap functions for the minix filesystem. */
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#define minix_test_and_set_bit(nr,addr) \
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__test_and_set_bit((nr),(unsigned long *)(addr))
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#define minix_set_bit(nr,addr) \
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__set_bit((nr),(unsigned long *)(addr))
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#define minix_test_and_clear_bit(nr,addr) \
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__test_and_clear_bit((nr),(unsigned long *)(addr))
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#define minix_test_bit(nr,addr) \
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test_bit((nr),(unsigned long *)(addr))
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#define minix_find_first_zero_bit(addr,size) \
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find_first_zero_bit((unsigned long *)(addr),(size))
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#endif /* __KERNEL__ */
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#endif /* defined(_SPARC_BITOPS_H) */
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