450dd430bf
* mem size now runtime configured (prev CONFIG_ARC_PLAT_SDRAM_SIZE) * core cpu clk runtime configured (prev CONFIG_ARC_PLAT_CLK) Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@secretlab.ca>
22 lines
500 B
C
22 lines
500 B
C
/*
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* Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <asm/clk.h>
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unsigned long core_freq = 800000000;
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/*
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* As of now we default to device-tree provided clock
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* In future we can determine this in early boot
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*/
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int arc_set_core_freq(unsigned long freq)
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{
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core_freq = freq;
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return 0;
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}
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