Each revmap type has different arguments for setting up the revmap. This patch splits up the generator functions so that each revmap type can do its own setup and the user doesn't need to keep track of how each revmap type handles the arguments. This patch also adds a host_data argument to the generators. There are cases where the host_data pointer will be needed before the function returns. ie. the legacy map calls the .map callback for each irq before returning. v2: - Add void *host_data argument to irq_domain_add_*() functions - fixed failure to compile - Moved IRQ_DOMAIN_MAP_* defines into irqdomain.c Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Milton Miller <miltonm@bga.com> Tested-by: Olof Johansson <olof@lixom.net>
203 lines
4.3 KiB
C
203 lines
4.3 KiB
C
/*
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* Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: John Rigby, <jrigby@freescale.com>
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*
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* Description:
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* MPC5121ADS CPLD irq handling
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*
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* This is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/prom.h>
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static struct device_node *cpld_pic_node;
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static struct irq_domain *cpld_pic_host;
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/*
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* Bits to ignore in the misc_status register
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* 0x10 touch screen pendown is hard routed to irq1
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* 0x02 pci status is read from pci status register
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*/
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#define MISC_IGNORE 0x12
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/*
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* Nothing to ignore in pci status register
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*/
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#define PCI_IGNORE 0x00
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struct cpld_pic {
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u8 pci_mask;
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u8 pci_status;
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u8 route;
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u8 misc_mask;
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u8 misc_status;
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u8 misc_control;
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};
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static struct cpld_pic __iomem *cpld_regs;
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static void __iomem *
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irq_to_pic_mask(unsigned int irq)
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{
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return irq <= 7 ? &cpld_regs->pci_mask : &cpld_regs->misc_mask;
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}
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static unsigned int
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irq_to_pic_bit(unsigned int irq)
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{
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return 1 << (irq & 0x7);
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}
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static void
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cpld_mask_irq(struct irq_data *d)
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{
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unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
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void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
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out_8(pic_mask,
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in_8(pic_mask) | irq_to_pic_bit(cpld_irq));
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}
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static void
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cpld_unmask_irq(struct irq_data *d)
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{
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unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
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void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
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out_8(pic_mask,
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in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq));
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}
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static struct irq_chip cpld_pic = {
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.name = "CPLD PIC",
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.irq_mask = cpld_mask_irq,
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.irq_ack = cpld_mask_irq,
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.irq_unmask = cpld_unmask_irq,
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};
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static int
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cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp,
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u8 __iomem *maskp)
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{
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int cpld_irq;
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u8 status = in_8(statusp);
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u8 mask = in_8(maskp);
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/* ignore don't cares and masked irqs */
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status |= (ignore | mask);
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if (status == 0xff)
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return NO_IRQ;
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cpld_irq = ffz(status) + offset;
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return irq_linear_revmap(cpld_pic_host, cpld_irq);
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}
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static void
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cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
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{
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irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status,
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&cpld_regs->pci_mask);
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if (irq != NO_IRQ) {
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generic_handle_irq(irq);
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return;
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}
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irq = cpld_pic_get_irq(8, MISC_IGNORE, &cpld_regs->misc_status,
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&cpld_regs->misc_mask);
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if (irq != NO_IRQ) {
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generic_handle_irq(irq);
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return;
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}
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}
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static int
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cpld_pic_host_match(struct irq_domain *h, struct device_node *node)
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{
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return cpld_pic_node == node;
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}
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static int
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cpld_pic_host_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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irq_set_status_flags(virq, IRQ_LEVEL);
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irq_set_chip_and_handler(virq, &cpld_pic, handle_level_irq);
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return 0;
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}
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static struct irq_domain_ops cpld_pic_host_ops = {
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.match = cpld_pic_host_match,
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.map = cpld_pic_host_map,
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};
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void __init
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mpc5121_ads_cpld_map(void)
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{
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struct device_node *np = NULL;
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np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
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if (!np) {
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printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
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return;
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}
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cpld_regs = of_iomap(np, 0);
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of_node_put(np);
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}
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void __init
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mpc5121_ads_cpld_pic_init(void)
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{
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unsigned int cascade_irq;
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struct device_node *np = NULL;
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pr_debug("cpld_ic_init\n");
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np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
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if (!np) {
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printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
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return;
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}
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if (!cpld_regs)
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goto end;
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cascade_irq = irq_of_parse_and_map(np, 0);
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if (cascade_irq == NO_IRQ)
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goto end;
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/*
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* statically route touch screen pendown through 1
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* and ignore it here
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* route all others through our cascade irq
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*/
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out_8(&cpld_regs->route, 0xfd);
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out_8(&cpld_regs->pci_mask, 0xff);
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/* unmask pci ints in misc mask */
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out_8(&cpld_regs->misc_mask, ~(MISC_IGNORE));
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cpld_pic_node = of_node_get(np);
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cpld_pic_host = irq_domain_add_linear(np, 16, &cpld_pic_host_ops, NULL);
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if (!cpld_pic_host) {
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printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");
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goto end;
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}
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irq_set_chained_handler(cascade_irq, cpld_pic_cascade);
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end:
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of_node_put(np);
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}
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