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b5b6c7eea1
linux-kernel-test/arch/sh/mm
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Matt Fleming b5b6c7eea1 sh: Replace unsafe manipulation of MMUCR 
Setting the TI in MMUCR causes all the TLB bits in MMUCR to be
cleared. Unfortunately, the TLB wired bits are also cleared when setting
the TI bit, causing any wired TLB entries to become unwired.

Use local_flush_tlb_all() which implements TLB flushing in a safer
manner by using the memory-mapped TLB registers. As each CPU has its own
PMB the modifications in pmb_init() only affect the local CPU, so only
flush the local CPU's TLB.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-23 13:36:21 +09:00
..
alignment.c sh: wire up SET/GET_UNALIGN_CTL. 2010-02-23 12:56:30 +09:00
asids-debugfs.c sh: Update debugfs ASID dumping for 16-bit ASID support. 2009-03-17 17:59:31 +09:00
cache-debugfs.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
cache-sh2.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
cache-sh2a.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
cache-sh3.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
cache-sh4.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
cache-sh5.c sh64: Fix up reworked cache op build. 2009-11-12 17:03:28 +09:00
cache-sh7705.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
cache.c sh: Guard against early IPIs in flush_cache_all(). 2010-01-15 14:21:37 +09:00
consistent.c sh: Bump up dma_ops initialization far earlier in the boot process. 2009-10-27 17:07:45 +09:00
extable_32.c sh: Split out extable.c _32 and _64 variants. 2008-01-28 13:18:44 +09:00
extable_64.c sh: comment tidying for sh64->sh migration. 2008-01-28 13:18:58 +09:00
fault_32.c Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm 2010-03-01 09:15:15 -08:00
fault_64.c sh: Tidy up NEFF-based sign extension for SH-5. 2009-08-04 17:14:39 +09:00
flush-sh4.c sh: Fix up the SH-5 build with caches enabled. 2009-08-16 01:50:17 +09:00
hugetlbpage.c hugetlb: introduce pud_huge 2008-07-24 10:47:18 -07:00
init.c sh: Merge legacy and dynamic PMB modes. 2010-02-18 18:13:51 +09:00
ioremap_fixed.c sh: reworked dynamic PMB mapping. 2010-03-02 16:40:06 +09:00
ioremap.c sh: reworked dynamic PMB mapping. 2010-03-02 16:40:06 +09:00
Kconfig sh: Merge legacy and dynamic PMB modes. 2010-02-18 18:13:51 +09:00
kmap.c sh: Factor in cpu id for selection of cache colour fixmap. 2009-09-09 17:14:19 +09:00
Makefile sh: uncached mapping helpers. 2010-02-17 16:28:00 +09:00
mmap.c fix broken aliasing checks for MAP_FIXED on sparc32, mips, arm and sh 2009-12-11 06:44:59 -05:00
nommu.c sh: Fix up nommu build for out-of-line pgtable changes. 2010-01-06 14:45:14 +09:00
numa.c sh: establish PMB mappings for NUMA nodes. 2010-03-03 13:16:31 +09:00
pgtable.c sh: default to extended TLB support. 2010-01-13 19:11:14 +09:00
pmb.c sh: Replace unsafe manipulation of MMUCR 2010-03-23 13:36:21 +09:00
tlb-pteaex.c sh: Flush ITLB too in PTEAEX's flush_tlb_page() 2010-03-23 13:36:15 +09:00
tlb-sh3.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
tlb-sh4.c sh: Mass ctrl_in/outX to __raw_read/writeX conversion. 2010-01-26 12:58:40 +09:00
tlb-sh5.c sh: Split out MMUCR.URB based entry wiring in to shared helper. 2010-01-19 15:20:35 +09:00
tlb-urb.c sh: Split out MMUCR.URB based entry wiring in to shared helper. 2010-01-19 15:20:35 +09:00
tlbflush_32.c sh: Replace unsafe manipulation of MMUCR 2010-03-23 13:36:21 +09:00
tlbflush_64.c sh: Acquire some more page flags for SH-5. 2010-01-16 14:29:06 +00:00
uncached.c sh: Export uncached helper symbols. 2010-03-10 16:46:58 +09:00