Zhao Yakui bb66c5122b drm/i915: Write zero to DPLL_MD Reg for non-SDVO output ... When the output device is LVDS, maybe the pixel clock of adjusted_mode will be less than that in mode. In such case it will set the incorrect multipler factor in DPLL_MD register. So the dpll_md_reg will be reset when the output type is non-SDVO https://bugs.freedesktop.org/show_bug.cgi?id=22761 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewd-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net>		2009-09-10 11:31:04 -07:00
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drm	drm/i915: Write zero to DPLL_MD Reg for non-SDVO output	2009-09-10 11:31:04 -07:00
Makefile	drm: reorganise drm tree to be more future proof.	2008-07-14 10:45:01 +10:00