e0f5fdca1c
Implement fast memory regions (FMRs), where the driver writes directly into the HCA's translation tables rather than requiring a firmware command. For Tavor, MTTs for FMR are separate from regular MTTs, and are reserved at driver initialization. This is done to limit the amount of virtual memory needed to map the MTTs. For Arbel, there's no such limitation, and all MTTs and MPTs may be used for FMR or for regular MR. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Roland Dreier <roland@topspin.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
278 lines
8.8 KiB
C
278 lines
8.8 KiB
C
/*
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* Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* $Id: mthca_profile.c 1349 2004-12-16 21:09:43Z roland $
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include "mthca_profile.h"
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enum {
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MTHCA_RES_QP,
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MTHCA_RES_EEC,
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MTHCA_RES_SRQ,
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MTHCA_RES_CQ,
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MTHCA_RES_EQP,
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MTHCA_RES_EEEC,
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MTHCA_RES_EQ,
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MTHCA_RES_RDB,
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MTHCA_RES_MCG,
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MTHCA_RES_MPT,
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MTHCA_RES_MTT,
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MTHCA_RES_UAR,
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MTHCA_RES_UDAV,
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MTHCA_RES_UARC,
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MTHCA_RES_NUM
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};
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enum {
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MTHCA_NUM_EQS = 32,
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MTHCA_NUM_PDS = 1 << 15
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};
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u64 mthca_make_profile(struct mthca_dev *dev,
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struct mthca_profile *request,
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struct mthca_dev_lim *dev_lim,
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struct mthca_init_hca_param *init_hca)
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{
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struct mthca_resource {
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u64 size;
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u64 start;
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int type;
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int num;
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int log_num;
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};
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u64 mem_base, mem_avail;
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u64 total_size = 0;
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struct mthca_resource *profile;
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struct mthca_resource tmp;
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int i, j;
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profile = kmalloc(MTHCA_RES_NUM * sizeof *profile, GFP_KERNEL);
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if (!profile)
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return -ENOMEM;
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memset(profile, 0, MTHCA_RES_NUM * sizeof *profile);
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profile[MTHCA_RES_QP].size = dev_lim->qpc_entry_sz;
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profile[MTHCA_RES_EEC].size = dev_lim->eec_entry_sz;
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profile[MTHCA_RES_SRQ].size = dev_lim->srq_entry_sz;
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profile[MTHCA_RES_CQ].size = dev_lim->cqc_entry_sz;
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profile[MTHCA_RES_EQP].size = dev_lim->eqpc_entry_sz;
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profile[MTHCA_RES_EEEC].size = dev_lim->eeec_entry_sz;
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profile[MTHCA_RES_EQ].size = dev_lim->eqc_entry_sz;
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profile[MTHCA_RES_RDB].size = MTHCA_RDB_ENTRY_SIZE;
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profile[MTHCA_RES_MCG].size = MTHCA_MGM_ENTRY_SIZE;
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profile[MTHCA_RES_MPT].size = dev_lim->mpt_entry_sz;
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profile[MTHCA_RES_MTT].size = MTHCA_MTT_SEG_SIZE;
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profile[MTHCA_RES_UAR].size = dev_lim->uar_scratch_entry_sz;
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profile[MTHCA_RES_UDAV].size = MTHCA_AV_SIZE;
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profile[MTHCA_RES_UARC].size = request->uarc_size;
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profile[MTHCA_RES_QP].num = request->num_qp;
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profile[MTHCA_RES_EQP].num = request->num_qp;
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profile[MTHCA_RES_RDB].num = request->num_qp * request->rdb_per_qp;
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profile[MTHCA_RES_CQ].num = request->num_cq;
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profile[MTHCA_RES_EQ].num = MTHCA_NUM_EQS;
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profile[MTHCA_RES_MCG].num = request->num_mcg;
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profile[MTHCA_RES_MPT].num = request->num_mpt;
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profile[MTHCA_RES_MTT].num = request->num_mtt;
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profile[MTHCA_RES_UAR].num = request->num_uar;
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profile[MTHCA_RES_UARC].num = request->num_uar;
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profile[MTHCA_RES_UDAV].num = request->num_udav;
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for (i = 0; i < MTHCA_RES_NUM; ++i) {
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profile[i].type = i;
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profile[i].log_num = max(ffs(profile[i].num) - 1, 0);
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profile[i].size *= profile[i].num;
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if (dev->hca_type == ARBEL_NATIVE)
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profile[i].size = max(profile[i].size, (u64) PAGE_SIZE);
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}
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if (dev->hca_type == ARBEL_NATIVE) {
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mem_base = 0;
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mem_avail = dev_lim->hca.arbel.max_icm_sz;
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} else {
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mem_base = dev->ddr_start;
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mem_avail = dev->fw.tavor.fw_start - dev->ddr_start;
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}
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/*
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* Sort the resources in decreasing order of size. Since they
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* all have sizes that are powers of 2, we'll be able to keep
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* resources aligned to their size and pack them without gaps
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* using the sorted order.
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*/
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for (i = MTHCA_RES_NUM; i > 0; --i)
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for (j = 1; j < i; ++j) {
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if (profile[j].size > profile[j - 1].size) {
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tmp = profile[j];
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profile[j] = profile[j - 1];
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profile[j - 1] = tmp;
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}
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}
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for (i = 0; i < MTHCA_RES_NUM; ++i) {
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if (profile[i].size) {
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profile[i].start = mem_base + total_size;
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total_size += profile[i].size;
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}
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if (total_size > mem_avail) {
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mthca_err(dev, "Profile requires 0x%llx bytes; "
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"won't in 0x%llx bytes of context memory.\n",
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(unsigned long long) total_size,
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(unsigned long long) mem_avail);
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kfree(profile);
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return -ENOMEM;
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}
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if (profile[i].size)
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mthca_dbg(dev, "profile[%2d]--%2d/%2d @ 0x%16llx "
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"(size 0x%8llx)\n",
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i, profile[i].type, profile[i].log_num,
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(unsigned long long) profile[i].start,
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(unsigned long long) profile[i].size);
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}
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if (dev->hca_type == ARBEL_NATIVE)
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mthca_dbg(dev, "HCA context memory: reserving %d KB\n",
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(int) (total_size >> 10));
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else
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mthca_dbg(dev, "HCA memory: allocated %d KB/%d KB (%d KB free)\n",
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(int) (total_size >> 10), (int) (mem_avail >> 10),
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(int) ((mem_avail - total_size) >> 10));
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for (i = 0; i < MTHCA_RES_NUM; ++i) {
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switch (profile[i].type) {
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case MTHCA_RES_QP:
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dev->limits.num_qps = profile[i].num;
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init_hca->qpc_base = profile[i].start;
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init_hca->log_num_qps = profile[i].log_num;
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break;
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case MTHCA_RES_EEC:
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dev->limits.num_eecs = profile[i].num;
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init_hca->eec_base = profile[i].start;
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init_hca->log_num_eecs = profile[i].log_num;
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break;
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case MTHCA_RES_SRQ:
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dev->limits.num_srqs = profile[i].num;
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init_hca->srqc_base = profile[i].start;
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init_hca->log_num_srqs = profile[i].log_num;
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break;
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case MTHCA_RES_CQ:
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dev->limits.num_cqs = profile[i].num;
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init_hca->cqc_base = profile[i].start;
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init_hca->log_num_cqs = profile[i].log_num;
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break;
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case MTHCA_RES_EQP:
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init_hca->eqpc_base = profile[i].start;
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break;
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case MTHCA_RES_EEEC:
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init_hca->eeec_base = profile[i].start;
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break;
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case MTHCA_RES_EQ:
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dev->limits.num_eqs = profile[i].num;
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init_hca->eqc_base = profile[i].start;
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init_hca->log_num_eqs = profile[i].log_num;
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break;
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case MTHCA_RES_RDB:
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for (dev->qp_table.rdb_shift = 0;
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request->num_qp << dev->qp_table.rdb_shift < profile[i].num;
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++dev->qp_table.rdb_shift)
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; /* nothing */
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dev->qp_table.rdb_base = (u32) profile[i].start;
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init_hca->rdb_base = profile[i].start;
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break;
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case MTHCA_RES_MCG:
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dev->limits.num_mgms = profile[i].num >> 1;
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dev->limits.num_amgms = profile[i].num >> 1;
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init_hca->mc_base = profile[i].start;
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init_hca->log_mc_entry_sz = ffs(MTHCA_MGM_ENTRY_SIZE) - 1;
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init_hca->log_mc_table_sz = profile[i].log_num;
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init_hca->mc_hash_sz = 1 << (profile[i].log_num - 1);
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break;
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case MTHCA_RES_MPT:
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dev->limits.num_mpts = profile[i].num;
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dev->mr_table.mpt_base = profile[i].start;
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init_hca->mpt_base = profile[i].start;
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init_hca->log_mpt_sz = profile[i].log_num;
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break;
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case MTHCA_RES_MTT:
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dev->limits.num_mtt_segs = profile[i].num;
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dev->mr_table.mtt_base = profile[i].start;
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init_hca->mtt_base = profile[i].start;
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init_hca->mtt_seg_sz = ffs(MTHCA_MTT_SEG_SIZE) - 7;
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break;
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case MTHCA_RES_UAR:
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dev->limits.num_uars = profile[i].num;
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init_hca->uar_scratch_base = profile[i].start;
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break;
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case MTHCA_RES_UDAV:
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dev->av_table.ddr_av_base = profile[i].start;
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dev->av_table.num_ddr_avs = profile[i].num;
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break;
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case MTHCA_RES_UARC:
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dev->uar_table.uarc_size = request->uarc_size;
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dev->uar_table.uarc_base = profile[i].start;
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init_hca->uarc_base = profile[i].start;
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init_hca->log_uarc_sz = ffs(request->uarc_size) - 13;
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init_hca->log_uar_sz = ffs(request->num_uar) - 1;
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break;
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default:
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break;
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}
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}
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/*
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* PDs don't take any HCA memory, but we assign them as part
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* of the HCA profile anyway.
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*/
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dev->limits.num_pds = MTHCA_NUM_PDS;
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/*
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* For Tavor, FMRs use ioremapped PCI memory. For 32 bit
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* systems it may use too much vmalloc space to map all MTT
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* memory, so we reserve some MTTs for FMR access, taking them
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* out of the MR pool. They don't use additional memory, but
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* we assign them as part of the HCA profile anyway.
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*/
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if (dev->hca_type == ARBEL_NATIVE)
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dev->limits.fmr_reserved_mtts = 0;
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else
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dev->limits.fmr_reserved_mtts = request->fmr_reserved_mtts;
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kfree(profile);
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return total_size;
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}
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