e81b6abebc
Atmel SoCs have one or multiple RAM controllers that need one or multiple clocks to run. This driver handle those clocks. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
15 lines
376 B
Makefile
15 lines
376 B
Makefile
#
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# Makefile for memory devices
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#
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ifeq ($(CONFIG_DDR),y)
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obj-$(CONFIG_OF) += of_memory.o
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endif
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obj-$(CONFIG_ATMEL_SDRAMC) += atmel-sdramc.o
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obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
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obj-$(CONFIG_TI_EMIF) += emif.o
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obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
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obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o
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obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o
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obj-$(CONFIG_TEGRA30_MC) += tegra30-mc.o
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