639da5ee37
Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com>
38 lines
1.0 KiB
ArmAsm
38 lines
1.0 KiB
ArmAsm
/*
|
|
* arch/arm/mach-at91/include/mach/debug-macro.S
|
|
*
|
|
* Copyright (C) 2003-2005 SAN People
|
|
*
|
|
* Debugging macro include header
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
*/
|
|
|
|
#include <mach/hardware.h>
|
|
#include <mach/at91_dbgu.h>
|
|
|
|
.macro addruart, rp, rv, tmp
|
|
ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address)
|
|
ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address)
|
|
.endm
|
|
|
|
.macro senduart,rd,rx
|
|
strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
|
|
.endm
|
|
|
|
.macro waituart,rd,rx
|
|
1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
|
|
tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
|
|
beq 1001b
|
|
.endm
|
|
|
|
.macro busyuart,rd,rx
|
|
1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
|
|
tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
|
|
beq 1001b
|
|
.endm
|
|
|