c22df08c7f
Upgrade nomadik pinctrl driver to enable selection of other alternate-C[1-4] functions on some specific ux500 SoC pins. Handling of those functions is done thanks to PRCM GPIOCR registers. This was previously managed in PRCMU driver and it was not really convenient. Idea is to provide a common way to control all alternate functions. Note that this improvement does not support the old-fashioned way used to control nomadik pins, namely the "nmk_config_pin()" function and its derivatives. Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com> Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
103 lines
2.8 KiB
C
103 lines
2.8 KiB
C
/*
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* Structures and registers for GPIO access in the Nomadik SoC
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*
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* Copyright (C) 2008 STMicroelectronics
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* Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
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* Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __PLAT_NOMADIK_GPIO
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#define __PLAT_NOMADIK_GPIO
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/*
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* "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
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* the "gpio" namespace for generic and cross-machine functions
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*/
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/* Register in the logic block */
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#define NMK_GPIO_DAT 0x00
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#define NMK_GPIO_DATS 0x04
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#define NMK_GPIO_DATC 0x08
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#define NMK_GPIO_PDIS 0x0c
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#define NMK_GPIO_DIR 0x10
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#define NMK_GPIO_DIRS 0x14
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#define NMK_GPIO_DIRC 0x18
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#define NMK_GPIO_SLPC 0x1c
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#define NMK_GPIO_AFSLA 0x20
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#define NMK_GPIO_AFSLB 0x24
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#define NMK_GPIO_LOWEMI 0x28
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#define NMK_GPIO_RIMSC 0x40
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#define NMK_GPIO_FIMSC 0x44
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#define NMK_GPIO_IS 0x48
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#define NMK_GPIO_IC 0x4c
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#define NMK_GPIO_RWIMSC 0x50
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#define NMK_GPIO_FWIMSC 0x54
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#define NMK_GPIO_WKS 0x58
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/* Alternate functions: function C is set in hw by setting both A and B */
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#define NMK_GPIO_ALT_GPIO 0
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#define NMK_GPIO_ALT_A 1
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#define NMK_GPIO_ALT_B 2
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#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
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#define NMK_GPIO_ALT_CX_SHIFT 2
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#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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/* Pull up/down values */
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enum nmk_gpio_pull {
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NMK_GPIO_PULL_NONE,
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NMK_GPIO_PULL_UP,
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NMK_GPIO_PULL_DOWN,
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};
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/* Sleep mode */
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enum nmk_gpio_slpm {
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NMK_GPIO_SLPM_INPUT,
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NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
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NMK_GPIO_SLPM_NOCHANGE,
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NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
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};
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extern int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode);
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extern int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull);
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#ifdef CONFIG_PINCTRL_NOMADIK
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extern int nmk_gpio_set_mode(int gpio, int gpio_mode);
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#else
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static inline int nmk_gpio_set_mode(int gpio, int gpio_mode)
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{
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return -ENODEV;
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}
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#endif
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extern int nmk_gpio_get_mode(int gpio);
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extern void nmk_gpio_wakeups_suspend(void);
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extern void nmk_gpio_wakeups_resume(void);
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extern void nmk_gpio_clocks_enable(void);
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extern void nmk_gpio_clocks_disable(void);
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extern void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up);
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/*
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* Platform data to register a block: only the initial gpio/irq number.
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*/
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struct nmk_gpio_platform_data {
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char *name;
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int first_gpio;
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int first_irq;
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int num_gpio;
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u32 (*get_secondary_status)(unsigned int bank);
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void (*set_ioforce)(bool enable);
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bool supports_sleepmode;
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};
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#endif /* __PLAT_NOMADIK_GPIO */
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