61a6976bf1
This takes a bit of a sledgehammer to the horribly CPU subtype ifdef-ridden header and abstracts all of the different register layouts in to distinct types which in turn can be overriden on a per-port basis, or permitted to default to the map matching the port type at probe time. In the process this ultimately fixes up inumerable bugs with mismatches on various CPU types (particularly the legacy ones that were obviously broken years ago and no one noticed) and provides a more tightly coupled and consolidated platform for extending and implementing generic features. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
34 lines
838 B
C
34 lines
838 B
C
#include <linux/serial_sci.h>
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#include <linux/serial_core.h>
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#include <linux/io.h>
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#include <cpu/serial.h>
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#define SCPCR 0xA4000116
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#define SCPDR 0xA4000136
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static void sh770x_sci_init_pins(struct uart_port *port, unsigned int cflag)
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{
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unsigned short data;
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/* We need to set SCPCR to enable RTS/CTS */
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data = __raw_readw(SCPCR);
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/* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
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__raw_writew(data & 0x0fcf, SCPCR);
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if (!(cflag & CRTSCTS)) {
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/* We need to set SCPCR to enable RTS/CTS */
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data = __raw_readw(SCPCR);
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/* Clear out SCP7MD1,0, SCP4MD1,0,
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Set SCP6MD1,0 = {01} (output) */
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__raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
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data = __raw_readb(SCPDR);
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/* Set /RTS2 (bit6) = 0 */
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__raw_writeb(data & 0xbf, SCPDR);
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}
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}
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struct plat_sci_port_ops sh770x_sci_port_ops = {
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.init_pins = sh770x_sci_init_pins,
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};
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