f1ecc69838
Some of the implementations, in particular the ioremap variants, in asm-generic/io.h are for systems without an MMU. In order to be able to use the generic header file for systems with an MMU, this patch wraps these implementations in checks for CONFIG_MMU. Tested on OpenRISC. Signed-off-by: Jonas Bonn <jonas@southpole.se> Cc: liqin.chen@sunplusct.com Cc: gxt@mprc.pku.edu.cn Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
371 lines
8.4 KiB
C
371 lines
8.4 KiB
C
/* Generic I/O port emulation, based on MN10300 code
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef __ASM_GENERIC_IO_H
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#define __ASM_GENERIC_IO_H
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#include <asm/page.h> /* I/O is all done through memory accesses */
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#include <asm/cacheflush.h>
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#include <linux/types.h>
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#ifdef CONFIG_GENERIC_IOMAP
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#include <asm-generic/iomap.h>
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#endif
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#ifndef mmiowb
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#define mmiowb() do {} while (0)
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#endif
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/*****************************************************************************/
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/*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the simple architectures, we just read/write the
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* memory location directly.
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*/
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#ifndef __raw_readb
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static inline u8 __raw_readb(const volatile void __iomem *addr)
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{
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return *(const volatile u8 __force *) addr;
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}
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#endif
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#ifndef __raw_readw
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static inline u16 __raw_readw(const volatile void __iomem *addr)
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{
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return *(const volatile u16 __force *) addr;
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}
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#endif
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#ifndef __raw_readl
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static inline u32 __raw_readl(const volatile void __iomem *addr)
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{
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return *(const volatile u32 __force *) addr;
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}
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#endif
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#define readb __raw_readb
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#define readw(addr) __le16_to_cpu(__raw_readw(addr))
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#define readl(addr) __le32_to_cpu(__raw_readl(addr))
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#ifndef __raw_writeb
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static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
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{
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*(volatile u8 __force *) addr = b;
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}
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#endif
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#ifndef __raw_writew
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static inline void __raw_writew(u16 b, volatile void __iomem *addr)
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{
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*(volatile u16 __force *) addr = b;
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}
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#endif
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#ifndef __raw_writel
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static inline void __raw_writel(u32 b, volatile void __iomem *addr)
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{
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*(volatile u32 __force *) addr = b;
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}
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#endif
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#define writeb __raw_writeb
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#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
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#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
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#ifdef CONFIG_64BIT
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static inline u64 __raw_readq(const volatile void __iomem *addr)
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{
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return *(const volatile u64 __force *) addr;
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}
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#define readq(addr) __le64_to_cpu(__raw_readq(addr))
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static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
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{
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*(volatile u64 __force *) addr = b;
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}
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#define writeq(b,addr) __raw_writeq(__cpu_to_le64(b),addr)
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#endif
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#ifndef PCI_IOBASE
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#define PCI_IOBASE ((void __iomem *) 0)
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#endif
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/*****************************************************************************/
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/*
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* traditional input/output functions
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*/
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static inline u8 inb(unsigned long addr)
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{
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return readb(addr + PCI_IOBASE);
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}
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static inline u16 inw(unsigned long addr)
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{
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return readw(addr + PCI_IOBASE);
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}
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static inline u32 inl(unsigned long addr)
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{
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return readl(addr + PCI_IOBASE);
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}
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static inline void outb(u8 b, unsigned long addr)
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{
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writeb(b, addr + PCI_IOBASE);
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}
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static inline void outw(u16 b, unsigned long addr)
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{
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writew(b, addr + PCI_IOBASE);
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}
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static inline void outl(u32 b, unsigned long addr)
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{
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writel(b, addr + PCI_IOBASE);
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}
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#define inb_p(addr) inb(addr)
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#define inw_p(addr) inw(addr)
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#define inl_p(addr) inl(addr)
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#define outb_p(x, addr) outb((x), (addr))
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#define outw_p(x, addr) outw((x), (addr))
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#define outl_p(x, addr) outl((x), (addr))
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#ifndef insb
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static inline void insb(unsigned long addr, void *buffer, int count)
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{
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if (count) {
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u8 *buf = buffer;
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do {
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u8 x = inb(addr);
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*buf++ = x;
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} while (--count);
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}
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}
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#endif
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#ifndef insw
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static inline void insw(unsigned long addr, void *buffer, int count)
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{
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if (count) {
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u16 *buf = buffer;
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do {
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u16 x = inw(addr);
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*buf++ = x;
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} while (--count);
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}
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}
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#endif
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#ifndef insl
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static inline void insl(unsigned long addr, void *buffer, int count)
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{
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if (count) {
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u32 *buf = buffer;
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do {
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u32 x = inl(addr);
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*buf++ = x;
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} while (--count);
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}
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}
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#endif
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#ifndef outsb
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static inline void outsb(unsigned long addr, const void *buffer, int count)
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{
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if (count) {
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const u8 *buf = buffer;
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do {
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outb(*buf++, addr);
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} while (--count);
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}
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}
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#endif
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#ifndef outsw
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static inline void outsw(unsigned long addr, const void *buffer, int count)
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{
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if (count) {
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const u16 *buf = buffer;
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do {
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outw(*buf++, addr);
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} while (--count);
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}
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}
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#endif
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#ifndef outsl
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static inline void outsl(unsigned long addr, const void *buffer, int count)
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{
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if (count) {
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const u32 *buf = buffer;
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do {
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outl(*buf++, addr);
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} while (--count);
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}
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}
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#endif
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static inline void readsl(const void __iomem *addr, void *buf, int len)
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{
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insl(addr - PCI_IOBASE, buf, len);
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}
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static inline void readsw(const void __iomem *addr, void *buf, int len)
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{
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insw(addr - PCI_IOBASE, buf, len);
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}
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static inline void readsb(const void __iomem *addr, void *buf, int len)
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{
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insb(addr - PCI_IOBASE, buf, len);
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}
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static inline void writesl(const void __iomem *addr, const void *buf, int len)
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{
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outsl(addr - PCI_IOBASE, buf, len);
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}
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static inline void writesw(const void __iomem *addr, const void *buf, int len)
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{
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outsw(addr - PCI_IOBASE, buf, len);
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}
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static inline void writesb(const void __iomem *addr, const void *buf, int len)
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{
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outsb(addr - PCI_IOBASE, buf, len);
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}
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#ifndef CONFIG_GENERIC_IOMAP
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#define ioread8(addr) readb(addr)
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#define ioread16(addr) readw(addr)
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#define ioread16be(addr) be16_to_cpu(ioread16(addr))
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#define ioread32(addr) readl(addr)
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#define ioread32be(addr) be32_to_cpu(ioread32(addr))
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#define iowrite8(v, addr) writeb((v), (addr))
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#define iowrite16(v, addr) writew((v), (addr))
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#define iowrite16be(v, addr) iowrite16(be16_to_cpu(v), (addr))
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#define iowrite32(v, addr) writel((v), (addr))
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#define iowrite32be(v, addr) iowrite32(be32_to_cpu(v), (addr))
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#define ioread8_rep(p, dst, count) \
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insb((unsigned long) (p), (dst), (count))
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#define ioread16_rep(p, dst, count) \
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insw((unsigned long) (p), (dst), (count))
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#define ioread32_rep(p, dst, count) \
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insl((unsigned long) (p), (dst), (count))
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#define iowrite8_rep(p, src, count) \
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outsb((unsigned long) (p), (src), (count))
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#define iowrite16_rep(p, src, count) \
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outsw((unsigned long) (p), (src), (count))
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#define iowrite32_rep(p, src, count) \
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outsl((unsigned long) (p), (src), (count))
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#endif /* CONFIG_GENERIC_IOMAP */
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#ifndef IO_SPACE_LIMIT
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#define IO_SPACE_LIMIT 0xffff
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#endif
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#ifdef __KERNEL__
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#include <linux/vmalloc.h>
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#define __io_virt(x) ((void __force *) (x))
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#ifndef CONFIG_GENERIC_IOMAP
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/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
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struct pci_dev;
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extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
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static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
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{
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}
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#endif /* CONFIG_GENERIC_IOMAP */
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/*
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* Change virtual addresses to physical addresses and vv.
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* These are pretty trivial
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*/
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static inline unsigned long virt_to_phys(volatile void *address)
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{
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return __pa((unsigned long)address);
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}
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static inline void *phys_to_virt(unsigned long address)
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{
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return __va(address);
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}
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/*
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* Change "struct page" to physical address.
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*
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* This implementation is for the no-MMU case only... if you have an MMU
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* you'll need to provide your own definitions.
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*/
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#ifndef CONFIG_MMU
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static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
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{
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return (void __iomem*) (unsigned long)offset;
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}
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#define __ioremap(offset, size, flags) ioremap(offset, size)
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#ifndef ioremap_nocache
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#define ioremap_nocache ioremap
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#endif
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#ifndef ioremap_wc
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#define ioremap_wc ioremap_nocache
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#endif
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static inline void iounmap(void *addr)
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{
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}
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#endif /* CONFIG_MMU */
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#ifndef CONFIG_GENERIC_IOMAP
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static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
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{
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return (void __iomem *) port;
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}
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static inline void ioport_unmap(void __iomem *p)
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{
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}
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#else /* CONFIG_GENERIC_IOMAP */
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extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
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extern void ioport_unmap(void __iomem *p);
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#endif /* CONFIG_GENERIC_IOMAP */
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#define xlate_dev_kmem_ptr(p) p
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#define xlate_dev_mem_ptr(p) __va(p)
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#ifndef virt_to_bus
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static inline unsigned long virt_to_bus(volatile void *address)
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{
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return ((unsigned long) address);
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}
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static inline void *bus_to_virt(unsigned long address)
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{
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return (void *) address;
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}
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#endif
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#define memset_io(a, b, c) memset(__io_virt(a), (b), (c))
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#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c))
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#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c))
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#endif /* __KERNEL__ */
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#endif /* __ASM_GENERIC_IO_H */
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