Lennert Buytenhek f1f5465782 [ARM] mv78xx0: enable eth2/eth3 on the mv78xx0 A0 development board ... The A0 revision of the mv78xx0 development board has four ethernet ports, with PHY IDs 8-11, whereas the Z0 version has two, with PHY addresses 8-9. This patch configures the third and fourth ethernet port to use the PHY addresses on the A0 board to enable use of those ports -- if we are running on a Z0 board, the ge10/11 setup code in common.c will force these back to PHYless mode. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>		2009-02-19 22:43:14 -05:00
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include/mach	[ARM] mv78xx0: distinguish between different chip steppings	2009-02-19 22:36:42 -05:00
addr-map.c	[ARM] Convert asm/io.h to linux/io.h	2008-09-06 12:10:45 +01:00
common.c	[ARM] mv78xx0: force eth2/eth3 to PHYless mode on pre-A0 silicon	2009-02-19 22:41:37 -05:00
common.h	[ARM] mv78xx0: distinguish between different chip steppings	2009-02-19 22:36:42 -05:00
db78x00-bp-setup.c	[ARM] mv78xx0: enable eth2/eth3 on the mv78xx0 A0 development board	2009-02-19 22:43:14 -05:00
irq.c	[ARM] 5401/1: Orion: fix edge triggered GPIO interrupt support	2009-02-17 22:37:09 +00:00
Kconfig	[ARM] add Marvell 78xx0 ARM SoC support	2008-06-22 22:45:10 +02:00
Makefile	[ARM] add Marvell 78xx0 ARM SoC support	2008-06-22 22:45:10 +02:00
Makefile.boot	[ARM] add Marvell 78xx0 ARM SoC support	2008-06-22 22:45:10 +02:00
pcie.c	[ARM] mv78xx0: distinguish between different chip steppings	2009-02-19 22:36:42 -05:00