5a25ad84e0
This patch adds USB HW initializiation code to /plat-mxc/ehci.c. -Sets some specific PHY settings Renames mxc_set_usbcontrol to mxc_initialize_usb_hw. Adds new register bit defines for the USB HW on Freescale SoCs. This patch applies to 2.6.34-rc6. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Reviewed-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
54 lines
1.5 KiB
C
54 lines
1.5 KiB
C
#ifndef __INCLUDE_ASM_ARCH_MXC_EHCI_H
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#define __INCLUDE_ASM_ARCH_MXC_EHCI_H
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/* values for portsc field */
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#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23)
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#define MXC_EHCI_FORCE_FS (1 << 24)
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#define MXC_EHCI_UTMI_8BIT (0 << 28)
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#define MXC_EHCI_UTMI_16BIT (1 << 28)
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#define MXC_EHCI_SERIAL (1 << 29)
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#define MXC_EHCI_MODE_UTMI (0 << 30)
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#define MXC_EHCI_MODE_PHILIPS (1 << 30)
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#define MXC_EHCI_MODE_ULPI (2 << 30)
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#define MXC_EHCI_MODE_SERIAL (3 << 30)
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/* values for flags field */
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#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0)
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#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0)
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#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
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#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0)
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#define MXC_EHCI_INTERFACE_MASK (0xf)
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#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5)
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#define MXC_EHCI_TTL_ENABLED (1 << 6)
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#define MXC_EHCI_INTERNAL_PHY (1 << 7)
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#define MXC_EHCI_IPPUE_DOWN (1 << 8)
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#define MXC_EHCI_IPPUE_UP (1 << 9)
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#define MXC_EHCI_WAKEUP_ENABLED (1 << 10)
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#define MXC_EHCI_ITC_NO_THRESHOLD (1 << 11)
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#define MXC_USBCTRL_OFFSET 0
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#define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8
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#define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc
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#define MX5_USBOTHER_REGS_OFFSET 0x800
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/* USB_PHY_CTRL_FUNC2*/
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#define MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK 0x3
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#define MX5_USB_UTMI_PHYCTRL1_PLLDIV_SHIFT 0
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struct mxc_usbh_platform_data {
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int (*init)(struct platform_device *pdev);
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int (*exit)(struct platform_device *pdev);
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unsigned int portsc;
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unsigned int flags;
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struct otg_transceiver *otg;
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};
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int mxc_initialize_usb_hw(int port, unsigned int flags);
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#endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */
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