25d21ad6e7
This adds the TLB miss handler assembly, the low level TLB flush routines along with the necessary hook for dealing with our virtual page tables or indirect TLB entries that need to be flushes when PTE pages are freed. There is currently no support for hugetlbfs Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
104 lines
2.7 KiB
C
104 lines
2.7 KiB
C
#ifndef __ASM_POWERPC_MMU_CONTEXT_H
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#define __ASM_POWERPC_MMU_CONTEXT_H
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#ifdef __KERNEL__
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <asm/mmu.h>
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#include <asm/cputable.h>
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#include <asm-generic/mm_hooks.h>
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#include <asm/cputhreads.h>
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/*
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* Most if the context management is out of line
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*/
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extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
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extern void destroy_context(struct mm_struct *mm);
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extern void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next);
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extern void switch_stab(struct task_struct *tsk, struct mm_struct *mm);
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extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
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extern void set_context(unsigned long id, pgd_t *pgd);
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#ifdef CONFIG_PPC_BOOK3S_64
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static inline void mmu_context_init(void) { }
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#else
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extern void mmu_context_init(void);
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#endif
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/*
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* switch_mm is the entry point called from the architecture independent
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* code in kernel/sched.c
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*/
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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/* Mark this context has been used on the new CPU */
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
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/* 32-bit keeps track of the current PGDIR in the thread struct */
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#ifdef CONFIG_PPC32
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tsk->thread.pgdir = next->pgd;
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#endif /* CONFIG_PPC32 */
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/* 64-bit Book3E keeps track of current PGD in the PACA */
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#ifdef CONFIG_PPC_BOOK3E_64
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get_paca()->pgd = next->pgd;
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#endif
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/* Nothing else to do if we aren't actually switching */
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if (prev == next)
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return;
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/* We must stop all altivec streams before changing the HW
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* context
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*/
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#ifdef CONFIG_ALTIVEC
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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asm volatile ("dssall");
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#endif /* CONFIG_ALTIVEC */
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/* The actual HW switching method differs between the various
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* sub architectures.
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*/
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#ifdef CONFIG_PPC_STD_MMU_64
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if (cpu_has_feature(CPU_FTR_SLB))
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switch_slb(tsk, next);
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else
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switch_stab(tsk, next);
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#else
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/* Out of line for now */
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switch_mmu_context(prev, next);
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#endif
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}
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#define deactivate_mm(tsk,mm) do { } while (0)
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/*
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* After we have set current->mm to a new value, this activates
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* the context for the new mm so we see the new mappings.
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*/
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static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
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{
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unsigned long flags;
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local_irq_save(flags);
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switch_mm(prev, next, current);
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local_irq_restore(flags);
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}
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/* We don't currently use enter_lazy_tlb() for anything */
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static inline void enter_lazy_tlb(struct mm_struct *mm,
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struct task_struct *tsk)
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{
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/* 64-bit Book3E keeps track of current PGD in the PACA */
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#ifdef CONFIG_PPC_BOOK3E_64
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get_paca()->pgd = NULL;
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#endif
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}
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#endif /* __KERNEL__ */
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#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
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