Commit Graph

8 Commits

Author SHA1 Message Date
Russell King
06afb1a087 Merge branches 'arnd-randcfg-fixes', 'debug', 'io' (early part), 'l2x0', 'p2v', 'pgt' (early part) and 'smp' into for-linus 2011-10-25 08:19:29 +01:00
Shawn Guo
26a527e69d ARM: 7100/1: smp_scu: remove __init annotation from scu_enable()
When Cortex-A9 MPCore resumes from Dormant or Shutdown modes,
SCU needs to be re-enabled.  This patch removes __init annotation
from function scu_enable(), so that platform resume procedure can
call it to re-enable SCU.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17 09:02:43 +01:00
Will Deacon
f630c1bdfb ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed
This patch implements a workaround for erratum 764369 affecting
Cortex-A9 MPCore with two or more processors (all current revisions).
Under certain timing circumstances, a data cache line maintenance
operation by MVA targeting an Inner Shareable memory region may fail to
proceed up to either the Point of Coherency or to the Point of
Unification of the system. This workaround adds a DSB instruction before
the relevant cache maintenance functions and sets a specific bit in the
diagnostic control register of the SCU.

Cc: <stable@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-17 12:47:17 +01:00
Rob Herring
10cdc7e512 ARM: 6960/1: allow enabling SCU code on UP
The scu_power_mode function can be used on UP builds as it drives signals
to an SOC power controller. So make it selectable for !SMP.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-06 20:55:15 +01:00
Russell King
292ec42af7 ARM: pm: add function to set WFI low-power mode for SMP CPUs
Add a function to set the SCU low-power mode for SMP CPUs.  This
centralizes this functionality rather than having to expose the
SCU register definitions to each platform.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-11 12:29:18 +00:00
Catalin Marinas
9b229fa095 Check whether the SCU was already initialised
If Linux is running in non-secure mode, this register may have been
already initialised and writing to the control register not allowed.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-11-05 10:10:36 +00:00
Catalin Marinas
af73110d23 [ARM] 5516/1: Flush the D-cache after initialising the SCU
On MP systems, the data loaded by CPU0 before the SCU was initialised
may not be visible to the other CPUs.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

This also includes the following compile fix:

This patch includes 'asm/cacheflush.h' which is needed to use
'flush_cache_all()' function.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-28 13:52:05 +01:00
Russell King
a8cbcd92bd [ARM] smp: separate SCU support code from realview
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-17 19:00:37 +01:00